IBM Seeks Customers For Neural Network Breakthrough

07 August 2014

A neuromorphic computing project at International Business Machines Corp. that has been going on for more than 6 years and has consumed more than $50 million in R&D funds has produced a spiking neural network IC dubbed TrueNorth. The chip, implemented in a leading-edge 28nm CMOS manufacturing process, can perform sophisticated tasks akin to the human processing of sensory data. It is a collaboration between IBM and Cornell Tech and is credited with being a major step forward in bringing cognitive computing into commercial deployment.

The device and its supporting programming infrastructure is sufficiently capable, and stable, to be ready for commercial application, said Dharmendra Mohda, IBM Fellow and Chief Scientist for Brain-Inspired Computing at IBM Research, adding that his company is seeking customers and partners to roll out the technology while it continues to pursue neuromorphic computing research.


The project, entitled Synapse – for Systems of Neuromorphic Adaptive Plastic Scalable Electronics (SyNAPSE) project has been sponsored by the United States Defense Advanced Research Project Agency (DARPA). The latest Synapse chip is described in a paper published in Science.

Built on Samsung’s 28nm process technology TrueNorth comprises 5.4 billion transistors in a 4.3 square centimeter die. It contains one million neurons and 256 million synapses implemented by an on-chip 64 by 64 mesh array (4096) of neurosynaptic cores. Each core integrates memory, computation, and communication, and operates in an event-driven, parallel, and fault-tolerant fashion. And yet the device consumes only 70mW while performing such functions as object classification and recognition.

Over previous years the Synapse project has produced previous prototype chips implementing brain-like computational fabric including neurons, synapses and axons and their rich interconnectedness. A previous single-core device produced in 2011 on 45nm CMOS contained 256 neurons. In 2013 IBM rolled out a new programming language and chip simulator called Compass to help with programming and training the neural network architecture.

Whereas the previous chip was at a level of a worm's nervous system the latest chip is equivalent in complexity to the brain of a bee, Mohda said. "This is not a refinement but three orders of magnitude improvement," Mohda told Electronics360.

The architecture

The basic building block is a self-contained core that implements 256 neurons connected by 256 by 256 cross point array of synaptic connections. More complex systems are made by communications between on- and off-chip cores. Each neuron on every core can target an axon on any other core. The system is digital with a global 1-kHz synchronization signal with cores operating in a parallel and event-driven fashion. Communication is conducted by way of spike signals.

When asked why neural networks, which have been implemented in simulation on conventional digital computers for many years should breakthrough into commercial deployment now Mohda made the point that previously the degree of parallelism supported had not been high while progress continued to be made in conventional processing architectures.

Layout of a single neurosynaptic core used in TrueNorth. Source: IBM.

But those conventional processors are now hitting a power-density wall that is forcing them to turn away from high clock frequencies and towards parallelism and low voltage operation in search of energy efficient computation. TrueNorth has a power density of 20mW per square centimetre, which is nearly four orders of magnitude less than conventional microprocessors.

However, Mohda made the point that conventional processors and neuromorphic processors are optimized for different types of function and that a chip that combined both architectures is also being pursued in research.

The TrueNorth neural network IC can be tiled, using off-chip communication highways. IBM has already produced 4 by 4 arrays on a printed circuit board and the ability to link adjacent chips provides scalability for future neurosynaptic supercomputers. It is possible to imagine systems that scale to one hundred billion neurons and one hundred trillion synapses, which is about the complexity of the human brain, and beyond.


Programming is done off-chip and is a non-trivial exercise but the work publicized in 2013 included the development of a programming language and a simulator called Compass.

To make the creation of cognitive applications easier IBM has created composable, reusable building blocks, called corelets, of useful functions associated with the processing of what will typically be sensory data. Each corelet has a particular function that can be put together in different configurations to create applications while hiding the complexity of programming and linking individual neurosynaptic cores. When this work was announced in 2013 IBM had developed a library of 150 corelets with plans to let third parties to go through testing procedures and submit more corelets.

This also speaks to the types of applications that TrueNorth could be best used for. "It's visual, it's audio, classification, recognition. Whatever the human can see, hear, touch, taste and smell; it's all neurons turning on and off," said Mohda.

A typical example is the use of TrueNorth for object detection and recognition in a real-time video stream.

Real-time multi-object recognition on TrueNorth. Source: IBM

"It is a research project coming to its culmination. We would like it to spread to customers, to academics, into low-power applications, into mobile. The ambition is to move it from the lab to the real world. We will continue research in terms of new chips, new systems," said Mohda.

While research always seeks to innovate Mohda said radical changes do not appear to be necessary. "We feel this parallel, scalable, event-driven, fault-tolerant architecture is very close in the world of silicon to minimizing power, size and delay," he said.

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