Electronic Design Automation

UMC and Synopsys Aim to Accelerate 14nm Design

16 March 2017

Pure-play foundry United Microelectronics Corp. (UMC) and electronic design automation (EDA) vendor Synopsys are collaborating on bringing Synopsys’ custom design tools for use in UMC’s 14 nanometer FinFET process.

Synopsys’ Custom Compiler and Laker tools will be used to create and validate a UMC 14nm industry-standard interoperable process design kit (iPDK) that will help to reduce the time it takes for users to layout and connect FinFET devices.

“This new 14-nanometer iPDK enables layout designers, including our own internal team, to use Synopsys' custom design tools for FinFET layout productivity,” says T.H. Lin, director of the IP Development and Design Support division at UMC.

Synopsys’ Custom Compiler integrates with Synopsys circuit simulation, physical verification and digital implementation tools for a complete custom design solution to UMC’s 14nm customers. With an open environment spanning schematics, simulation analysis and layout, the Custom Compiler shortens the time it takes to design tasks from days to hours, Synopsys says. The tool includes visually-assisted automation with a graphical use model that eliminates the need to write complicated code and constraints. The tool completes routine and repetitive tasks automatically without extra setup and reduces design iterations by catching physical and electrical errors before signoff verification.

To contact the author of this article, email PBrown@globalspec.com

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