Semiconductor Equipment

Synopsys Physical Verification Tools Certified for Samsung’s 14nm Manufacturing Process

18 February 2016

Synopsys Inc. says that its IC Validator physical verification product has been certified by Samsung Foundry for all designs using the Korean giant’s 14 nanometer manufacturing processes. The IC Validator has been certified in Samsung runsets including design rule checking (DRC), layout-versus-schematic (LVS) and metal fill technology files. Part of the Synopsys Galaxy Design Platform, IC Validator is a tool suite that uses its scalable hybrid data and command-processing engines for coding and validating the polygon and edge-based rules required for emerging process nodes including 14nm.

Synopsys says the tool suite provides coding at higher levels of abstraction and is architected for near-linear scalability that maximizes utilization of mainstream hardware, using smart memory-aware load scheduling and balancing technologies. Synopsys says the IC Validator can also be used as an add-on to its IC Compiler II system for in-design physical verification, making it possible for place-and-route engineers to perform independent signoff-quality analysis earlier, before the design is finalized and while correction can be automated.

The certified runsets from Samsung Foundry are available now.

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