ARM Offers Optimized IoT Subsystem

ARM Holdings plc (Cambridge, England) is offering for license a subsystem for an Internet of Things (IoT)-connected device that can be implemented on the 55nm Ultra-Low Power (55ULP) process from Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC).

Licensable ARM subsystem provides the glue for an IoT SoC on 55ULP process. [Click to enlarge]The hardware subsystem is designed to link to a separately licensed Cortex-M processor core, typically a Cortex-M3 or Cortex-M4, and separately licensed radio frequency communications circuits from the ARM Cordio IP portfolio. This combination will work with ARM's mbed OS (see ARM Offers Free OS for Internet of Things).

TSMC announced the 55ULP process in September 2014 (see TSMC Tips Low-Voltage Processes Aimed at Wearables, IoT).

The Cordio portfolio of IP is based on ARM's acquisition of two U.S. companies: Wicentric Inc. and Sunrise Micro Devices Inc. Wicentric contributes exactLE, a protocol stack for single-mode Bluetooth low-energy devices that is Bluetooth 4.0 qualified. Sunrise Micro has designed a self-contained Bluetooth radio block with related firmware. A key part of the Sunrise-originated IP is that it is designed to work at sub-one volt enabling radios to run longer on batteries or harvested energy (see Acquisitions Take ARM IP Portfolio into RF).

Licensable subsystem covers two points in a range of four approaches to IoT SoCs identified by ARM. [Click to enlarge]The licensable subsystem IP block, together with a Cortex-M processor and ARM radio IP, forms the basis for an IoT end-point chip design. It has also been optimized, together with the appropriate Artisan physical IP, for TSMC's 55ULP process, which includes embedded flash as a non-volatile memory option.

The approach covers two of four approaches to IoT identified by ARM on its website (see table).

One of the main things the IoT subsystem does is support an integrated flash cache, which can reduce flash memory power consumption by 99%, ARM says on its website.

The subsystem also includes the ARM on-chip interconnect, which has been designed to allow additional peripherals on both the AHB and APB sections. Both master and slave AHB ports are available for connection of external blocks, offering the flexibility to build different kinds of architectures around the subsystem.

The layered structure of the interconnection enables multiple masters to initiate accesses simultaneously and not stall each other. In addition to an increase in peak throughput, this also ensures that the processor can complete its tasks as fast as possible and quickly return to sleep mode to save power. It is possible to integrate other radios and wireless networking standards such as Wi-Fi and 802.15.4.

Companies expected to license the subsystem include analog sensor-makers and companies looking to add IoT connectivity to existing IP.

James McNiven"With industry expectations of hundreds of billions of new smart-connected sensors by 2030, we see a growing demand for highly customized chips," says James McNiven, general manager of systems and software at ARM, in a statement. "The ARM IoT subsystem for Cortex-M enables companies to simplify the process and improve time to market. It enables our partners to focus finite design resources on the system functionality that differentiates them in their market."

Questions or comments on this story? Contact peter.clarke@ihs.com

Related links:

www.arm.com

www.tsmc.com

IHS Semiconductor Manufacturing

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