TSMC's announcement that it has developed revised versions of its manufacturing processes at the 55, 40 and 28nm nodes (see TSMC Tips Low-Voltage Processes Aimed at Wearables, IoT) gives the world's leading pure-play foundry a clear lead in the implementation in low-power designs in volume.
Indeed, the foundry somewhat underplayed its hand by simply announcing that it had produced a set of ultra-low power processes with the suffix ULP. The fact is that every foundry claims its processes are low-power, very low-power, extremely low-power. And those labels mean nothing until you actually come up with some metrics and put some numbers on it.
Well operating voltage is pretty good metric for active power consumption, as power scales with the square of the voltage, and this is how the ULP processes from TSMC play out, according to email correspondence from a TSMC spokesperson.
55ULP from 1.2V to 0.9V (minimum to 0.81V)
40ULP from 1.1V to 0.9V (minimum to 0.81V)
28ULP from 0.9V to 0.6V (minimum to 0.5V)
Voltages are well below 1V and accompanied by three to five options of threshold voltage operation.
As the TSMC spokesperson said: "The key to ULP is to offer lower operating voltage and to introduce low leakage device to significantly reduce total power, so battery life can be extended."
"Regarding near-threshold voltage operation, our ULP technology platform does support near-threshold design. There have been a few near-threshold design cases in the past. So far most of the effort is from the design side. That said, we are starting to build up more complete design ecosystem including foundation IPs to support further power reduction requirements," the spokesperson added.
TSMC is not advocating sub-threshold voltage operation and nor are these processes quite in the near-threshold voltage regime but the foundry is building an ecosystem of support for near-threshold voltage operation. In that regard the team of TSMC, along with ARM, Cadence, Synopsys and other IP suppliers are pioneering a new circuit regime that is tuned to battery and harvested energy operation.
And when we look at the negative impact on the planet of making,using and dumping batteries it must be agreed that in the long-term energy-harvesting is the way forward in the medium- to long-term.
Moving to such low voltages is easily said but not so easily done. As you reduce the voltage you also reduce the achievable clock frequency for digital designs. The minimum energy may well be achieved by going parallel and using multiple cores doing just a bit of the work while sipping tiny amounts of power. But that means more silicon area and therefore more manufacturing cost but less operational cost through power consumption. In near-threshold voltage operation the trade offs of power, performance and area/cost remain and they remain complicated.
But for some IoT type applications with wireless sensor nodes doing simple things but the value in the aggregation of the "little data" then clearly lowest power is the way to go.
It is also notable that earlier this year Freescale's MCU boss, Geoff Lees, was calling for more support from foundries and IP licensors for near-threshold voltage microcontrollers. TSMC has answered that call and the resulting low-voltage differentiation from its competition looks set to repay its efforts with IoT designs running through its wafer fabs.
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