Electronic Design Automation

Synopsys and TSMC collaborate on design platforms for 5 nm and 6 nm process technologies

19 May 2020

Electronic design automation (EDA) giant Synopsys has certified its digital and custom design platforms for Taiwan Semiconductor Manufacturing Corp. (TSMC)’s 6 nm and 5 nm process technologies.

The product design is for vertical markets such as high-performance computing (HPC) mobile, 5G and artificial intelligence chip designs. The certification is from a multi-year collaboration to deliver a path to next generation designs with improvements in power savings and design performance. Synopsys’ collaboration with TSMC also extends to 3DIC process technologies including CoWos, InFo and TSMC-SoIC for scalable integration for achieving greater functionality and enhanced system performance.

The certification allows designers to enhance density, operating frequency and power consumption in TSMC’s 5 nm and 6 nm process technologies. Synopsys said tools have also been improved to support ultra-low VDD requirements for low power consumption in mobile and 5G designs.

To contact the author of this article, email engineering360editors@globalspec.com

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