QuickLogic Corp. has unveiled the latest version of its Aurora embedded field programmable gate array (eFPGA) development tool suite.
The Aurora 2.1 development tool suite is a fully open-source implementation for scalability, longevity and full code transparency that supports all major HDLs like Verliog, System Verliog and VHDL.
The new version is based on open-source syntheses, versatile place and route (VPR) and bitstream generation OpenFPGA software. It allows designers to go from RTL-to-bitstream for QuickLogic’s eFPGA IP. The tool suite also supports architecture analysis mode.
Benefits to the updated software includes:
- Architectural trade-offs allowing generated eFPGA IP to have the optimum amount of logic, BRAM and DSP blocks.
- Highly inspectable code for continuous improvement by the development community.
- Auditable code for higher quality software flexibility enabling merit-based addition of features by the community.
- The open-source components allow users to be in control of the future proofing of the technology.
"QuickLogic remains committed to open source, and our new Aurora 2.1 Development Tool Suite underscores that mission," said Mao Wang, senior director of product development at QuickLogic Corporation. "Now, SoC developers can combine the advantages of open-source tools with the dramatic flexibility benefits of embedding FPGA technology into their devices to improve device lifecycles and enhance profitability."
