Electronic Design Automation

Cadence, Synopsys join Intel’s foundry alliance

09 February 2022

Cadence Design Systems Inc. and Synopsys Inc. have joined Intel Foundry Services (IFS) Ecosystem Alliance.

The alliance is designed help customers with the development and delivery of system-on-chip (SoC) designs. As part of the alliance, the companies will help with the adoption of Intel process and packaging technologies with digital, custom/analog, verification and IC packaging electronic design automation (EDA) solutions.

Cadence said benefits to being in the alliance allows the company to have early access to process and advanced IC packaging roadmaps, process design kits and technical training. The EDA companies can fine-tune EDA tools and IP for Intel’s portfolio of process and packaging technologies to meet power, performance and area requirements.

Intel’s alliance is poised to help foundry customers bring silicon products from idea to implementation using a collaboration of companies in the EDA, intellectual property and design services sectors.

Under the IFC Accelerator program:

  • EDA solutions will be optimized for Intel’s technology and manufacturing.
  • Users will get access to silicon-verified and process-specific IP portfolios including standard cell libraries, embedded memories, general purpose I/Os, analog IP and interface IP.
  • Customers can focus on creating product ideas, assigning implementation tasks to designers that know Intel’s technology.
To contact the author of this article, email PBrown@globalspec.com


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