The ever-increasing complexity of system-on-chip (SoC) electronic circuitry demands robust and error-free design and testbench code. Helping engineers to achieve that is the goal of Euclide, a new code-checking solution from Synopsys.
Introduced at the beginning of March 2021, Euclide is a hardware description language (HDL)-aware integrated development environment (IDE) made for early design bug detection and code optimization. One of its standout features is its ability to perform on-the-fly incremental compilation, elaboration, pseudo-synthesis and rule checking. Each of these operations are integrated into the editor, enabling rapid feedback to be provided during code development.
Synopsis Euclide is a new integrated development environment made for early design bug detection and code optimization. Source: Pexels/CC0 via PixabayBy identifying bugs early, the tool can help to avoid unnecessary simulation cycles, lengthy debug sessions and chip re-spins. Its innovative engine architecture also produces incremental analysis, error recoverability and advanced feedback on incomplete code. Euclide can minimize register-transfer level (RTL) and testbench implementation bugs, improving project convergence rate and eliminating patchy code.
Microsoft Corporation’s senior hardware engineering manager, Assaf Shacham, endorsed the new tool in a Synopsys press release. “The on-the-fly design and testbench checks in Synopsys Euclide have helped us in unmasking critical bugs otherwise identified at late design stages,” he said. “In addition, the efficiency of our experienced design and verification engineers, as well as the learning curve of new engineers has significantly improved by using the various IDE coding acceleration and code exploration features.”
Euclide’s correct-by-construction coding features context-specific autocompletion and content assistance tuned for Synopsys VCS simulation, Verdi debug and ZeBu emulation, and is also compatible with Design Compiler NXT synthesis solutions. Its built-in SystemVerilog and Universal Verification Methodology (UVM) compliance also assures best coding practices across verification teams.
Features include:
Fast RTL and testbench checking
- Runs on-the-fly while typing code, typically producing feedback in seconds
- Avoids re-spins, unnecessary simulations and lengthy debug sessions
Accelerated coding
- Context-specific autocompletion and content assistance
- Reference signals, parameters and struct/class members
- Representation of modules and interfaces with all parameters and ports
View, review and navigation capabilities
- Design and UVM hierarchy tree
- Data type and parameter view featuring hierarchy-dependent values
- Semantic coloring and advanced semantic search
The Euclide on-the-fly code checking solution is now available. VCS and Verdi users can adopt the solution using existing project files and scripts.
