STMicroelectronics has built an experimental 3D-graphics engine designed as part of the European Union’s Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration (FASTER) initiative.
The technology has been implemented on an ARM-based processor test chip attached to a field programmable gate array (FPGA) that was partially funded by the FASTER initiative and with the cooperation of R&D house Politecnico di Milano, ST said.
FASTER is a multi-national research project, partially funded by the European Commission’s Seventh Framework Program (FP7) for Research and Technological Development. The companies in the project other than ST include Maxeler Technologies and Synelixis Solutions as well as research partners Hellas, Ghent University, Imperial College London and Politecnico di Milano.
Danilo Pau, senior member of the technical staff at ST, said in a statement in order for the multimedia and smart camera markets to grow, reconfigurable hardware that is low-cost and flexible is a must. The technology developed as part of the FASTER project “has the potential to boost computational power per silicon area per power consumption” while adding new features to “embedded systems capabilities,” he said.
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