Xilinx has reached three milestones on its 20 nm device tape-out schedule. The company has taped out the semiconductor industry's first 20nm device. It has also taped out the PLD industry's first 20 nm All Programmable device, as well as implemented the industry's first ASIC-class programmable architecture called UltraScale.
"We believe we are about a year ahead in delivering 1.5 to 2X more realizable system-level performance and integration—an equivalent to a generation ahead of our competition," said Victor Peng, SVP of Programmable Products Group.
Xilinx has extended its work with TSMC to infuse high-end FPGA requirements into the TSMC 20SoC development process. As a result the architecture addresses the limitations to scalability of total system throughput and latency, and also overcomes the Interconnect bottleneck to chip performance at advanced nodes.
The innovative architectural approach manages multi-hundred gigabit-per-second levels of system performance with smart processing at full line rate, scaling to terabits and teraflops. These challenges are addressed by applying leading-edge ASIC techniques in a fully programmable architecture.
The initial UltraScale devices will extend the company's Virtex and Kintex FPGA and 3D IC families now based on 28 nm process technology, and will serve as the foundation for future Zynq UltraScale All Programmable SoCs.
