Semiconductor Equipment

Optimizing power, performance and safety

23 January 2024

Whether evidenced by the cooling and cost demands of data center power consumption, the expectation of battery-driven devices to last longer between charges or a thousand other challenges, managing power is a big issue in modern technology. Devices for advanced power management exist, but they face a tough balancing act between maximizing performance, consuming the least amount of power and guaranteeing a lack of failure in field.

One way to avoid failure is to employ guard bands: those narrow frequency ranges that — instead of being used to boost performance or reduce power — are intentionally left unused, allowing them to function as safety margins.

proteanTecsproteanTecsFor deep data analytics provider ProteanTecs, optimal planning around guard bands is achieved with a new power-reduction solution that employs on-chip telemetry, machine learning and predictive analytics. These strategies combine to enable workload-aware, system-on-chip (SoC) power reduction during production testing and in-field operations.

Based on personalized device assessment and the real-time visibility of actual timing margins under functional workloads, the new solution highlights unique offerings including power characterization, very-low-voltage (VDDmin) prediction for inline testing and functional-workload-aware adaptive voltage scaling (AVS). According to the company, these capabilities can be used independently or concurrently to maximize power savings by over 10% with a protection layer.

In-field power savings are the domain of closed-loop hardware-firmware application AVS Pro. Based on timing margin agents, AVS Pro leverages excessive guard bands to reduce power while guaranteeing failure prevention. ProteanTecs said that the silicon-proven technology has enabled customers to reduce their power consumption by an average of 8% to 14%, as illustrated by this white paper.

For power reduction during production, ProteanTecs offers applications for prediction-based VDDmin optimization per individual chip and system, with deep data analytics for process grading. These applications are deployed on the tester with advanced analysis on the ProteanTecs cloud platform. Partnering with leading automated test equipment (ATE) vendors, the company enables parametric power and performance visibility for inline decision making.

The new power reduction solution is designed to offer several advantages to performance- and reliability-critical markets, including cloud computing, consumer devices, telecommunications and automotive. By optimizing power-hungry components, ProteanTecs said, customers can improve operational efficiencies and prolong the lifetime of their system’s electronics, leading to significant cost savings and higher system utilization rates.

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