Synopsys Inc. has expanded its agreement with Samsung Foundry to develop a portfolio of intellectual property (IP) that will be used in semiconductor manufacturing to reduce design risk and accelerate silicon success.
Previously, Synopsys and Samsung collaborated on IP offerings for Samsung’s 8LPU, SF5, SF4 and SF3 processes including foundation IP, USB, PCI Express, 112G Ethernet, UCIe, LPDDR, DDR, MIPI and more.
Under the new deal, Synopsys will optimize IP for Samsung’s SF5A and SF4A automotive process nodes to meet Grade 1 and Grade 2 temperature and AEC-Q100 reliability requirements. This IP will allow automotive designers to reduce design effort and accelerate AEC-Q100 requirements, Synopsys said.
The automotive IP will be used in advanced driver assistance (ADAS) system-on-chips (SoCs) and will include design failure mode and effect analysis (DFMEA) reports that Synopsys said can save months on development efforts.
"Our extensive co-optimization efforts with Samsung across both EDA and IP help automotive, mobile, HPC and multi-die system architects cope with the inherent challenges of designing chips for advanced process technologies," said John Koeter, senior vice president of product management and strategy for IP at Synopsys. "This extension of our decades-long collaboration provides designers with a low-risk path to achieving their design requirements and quickly launching differentiated products to the market."