Electronic design automation (EDA) vendor Synopsys Inc. using its Design Space Optimization AI (DSO.ai) autonomous design system has helped 100 customers accelerate artificial intelligence-driven chip designs.
The company announced the achievement after its customers — including semiconductor firms ST Microelectronics and SK Hynix — have seen significant uplifts in productivity and are charting a design course using learning-enabled design tools on cloud and on premises.
DSO.ai allows companies to quicken development of advanced-node chips through the key design phases. The result is an increase of more than three times in productivity, up to 25% lower total power and a significant reduction in die size with reduced use of overall resources, Synopsys said.
Design space exploration is typically a labor-intensive effort requiring months of experimentation. Synopsys DSO.ai searchers design spaces autonomous to discover optimal PPA solutions scaling the exploration of choices in chip design workflows and automaking the menial tasks, Synopsys said.
Synopsys monitored the first 100 commercial tape-outs by customers using Synopsys’ DSO.ai and found whether in the cloud, on premises or a hybrid of the two significant gains were found. This includes optimized designs delivering better results and faster time-to-market.
How it is being used
At ST, the company is using cloud-based versions of DSO.ai to generate momentum on its design phases. ST taped-out using the software coupled with Synopsys Fusion Compiler and Synopsys IC Compiler II physical implementation tools.
The DSO.ai design system running on Microsoft Azure allowed ST to increase its PPA exploration production by three times to implement a new Arm core.
At SK Hynix, the DSO.ai autonomous software brings a huge amount of design team efficiency and gives engineers more time to create differentiated features for the next generation of products.
"It's also driving fantastic results as demonstrated in a recent project where DSO.ai delivered a 15% cell area reduction and a 5% die shrink,” said Junhyun Chun, head of SoC at SK Hynix.
