Synopsys Inc.’s digital and custom design flows have been certified on Taiwan Semiconductor Manufacturing Co. (TSMC)’s N3E process technology.
The flows as well as the foundation and interface IP portfolio has achieved multiple successful tapeouts on the TSMC N3E process. Synopsys said this will help customers accelerate silicon success. The efforts on the advanced process technology will also extend to analog design migration, artificial intelligence (AI) drive designs and physical verification scaling in the cloud.
TSMC’s N3E process extends its 3 nm family with enhanced power, performance and yield for applications such as high-performance computing, AI and mobile.
The AI-driven design technology and Synopsys Fusion Compiler has resulted in multiple validated N3E test cases with better PPA and faster design closure.
Synopsys said it is working with TSMC to scale physical verification in the cloud using its IC validator product for N3E on the Synopsys cloud software-as-a-service offering. The application accesses unlimited CPU capacity in the cloud for faster physical verification iterations.
Additionally, the two companies are also enabling customers to seamlessly transition existing designs on earlier process nodes to the TSMC N3E process.
