Electronic Design Automation

Synopsys ports IP portfolio on TSMC’s 3nm process

25 July 2023

Synopsys Inc has succeeded in first-pass silicon for its intellectual property (IP) portfolio on Taiwan Semiconductor Manufacturing Co.’s (TSMC) N3E process technology.

The portfolio includes multiple product lines such as the most widely used protocols, leading power, performance area (PPA) and latency. TSMC’s N3E node allows users to accelerate development of artificial intelligence, high-performance computing (HPC) and mobile designs.

The technology includes interface IP like:

  • 112G Ethernet
  • LPDDR5X
  • DDR5
  • PCIe
  • USB/DisplayPort
  • MIPI C/D-PHY

The move follows Synopsys’ certification of its digital and custom design flows on TSMC’s N3E process technology. The flows as well as the foundation and interface IP portfolio has achieved multiple successful tapeouts on the TSMC N3E process.

To contact the author of this article, email GlobalSpecEditors@globalspec.com


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