Electronic Design Automation

VSORA introduces PetaFLOPS computational platform for self-driving cars

08 October 2020

Intellectual property (IP) vendor Vsora has rolled out a PetaFLOPS computational platform for Level 4 and Level 5 autonomous vehicle designs.

The AD1028 IP block combines multi-core digital signal processing (DSP) and machine learning that eliminates the need for DSP co-processors and hardware accelerators. Level 4 and Level 5 autonomous driving are seen as the point where the vehicle is doing the majority of the driving rather than the human behind the wheel (See: “A primer to the 6 levels of autonomous driving” for more information).

At Level 4, a human driver can still take control of the vehicle while Level 5 removes the human driver entirely. Because of this, the computational requirements for safety at these levels of autonomy are complex.

The AD1028 IP, which can be implemented on 7 nm process technology, powers 1,028 TeraFlops (1 PetaFLOPS) running at 2 GHz processing eight million-pixel images in less than 7 milliseconds and a full HD image in less than 1.6 milliseconds. This allows the IP to handle multiple parallel instances of any combination of sensor fusions. The computational device eliminates the performance bottleneck associated with external memories caused by restricted data-transfer bandwidth and reduces latency and power consumption of the memory, Vsora said.

Through an on-chip memory shared between the platform’s DSP and AI sections, the IP allows users to implement efficient, low-latency perception stage and combine it with the planning stage on the same device using algorithmic combinations of AI and mathematical formulas.

To contact the author of this article, email engineering360editors@globalspec.com

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