Semiconductors and Components

Compact model developed at CEA-Leti for FD-SOI technologies designated as a chip-industry standard

02 April 2020

L-UTSOI, a compact model dedicated to fully depleted silicon-on-insulator (FD-SOI) technologies and developed by CEA-Leti, has been selected as a standard model by the Compact Model Coalition (CMC), a working group composed of the major semiconductor companies and part of the Silicon Integration Initiative (Si2).

Source: CEA-LetiSource: CEA-LetiL-UTSOI was extensively proven by the industry and its standardization will ensure long-term access and maintenance in EDA tools for FD-SOI designers. Available to coalition members now, it will soon be implemented in major versions of circuit-simulation software, and its source code will be released publicly in June 2021.

Once a new or enhanced chip is designed, it must be simulated prior to entering the expensive manufacturing phase. This proof-of-concept step relies on compact models that are expressed through a set of equations implemented in a form ensuring accuracy, robustness and numerical efficiency. Such compact models are approved and supported by the standard-setting arm of Si2, the CMC, which is an international working group focused on standardizing SPICE device models.

Standard models are developed by the world’s leading SPICE-model experts. They are used by designers working at the most advanced fabless semiconductor companies, integrated circuit foundries and integrated device manufacturers. Implemented in the industry’s top versions of circuit-simulation software and duly qualified, standard models give designers the assurance that their integrated circuits will perform according to the design specifications.

FD-SOI, which was pioneered by CEA-Leti in 1992, is a widely used approach to semiconductor manufacturing in which microelectronic devices are built on wafers coated with a silicon thin film over an insulating buried-silicon-oxide layer. An FD-SOI transistor is a four-pin transistor with a back-gate that allows tuning the device in a low-leakage and low-power operating regime or higher performance operating regime. This unique capability offered by FD-SOI technology allows the fabrication of smaller, faster and denser chips than standard complementary metal-oxide semiconductor (CMOS) technology. FD-SOI devices are widely used in wearable electronics, automobiles, as well as internet of things networks.

To contact the author of this article, email GlobalSpecEditors@globalspec.com


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