Altera, TSMC Team on New Packaging for FPGAs

08 April 2015

Programmable logic vendor Altera Corp. has collaborated with foundry Taiwan Semiconductor Manufacturing Corp. (TSMC) to create new packaging technology designed to enhance the quality, reliability and integration of Altera’s MAX 10 FPGAs.

The under-bump metalization-free (UBM-free) wafer-level chip scale package (WLCSP) allows for a height of less than 0.5 millimeters for use in applications where space is at a premium, such as small form-factor industrial equipment and portable electronics, Altera says.

The UBM-free WLCSP provides a better than 200% improvement in board-level reliability compared to standard WLCSP, while allowing for a large die size and higher package I/O count, Altera says. Copper routing capability and inductor performance are also enhanced as a result of the packaging, the company says.

Altera is currently sampling MAX 10 FPGAs with the new WLCSP packaging in 81-pin and 36-pin configurations.

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