Memory and Storage

Nanotube Memory Shows Universal Potential

18 June 2014

Nantero Inc., which uses a layer of carbon nanotubes (CNTs) in a variable resistance non-volatile memory, has reported on a 140nm implementation of what it calls NRAM at the VLSI Technology Symposium.

The company claims the speed and energy of switching demonstrated in the results show its NRAM can be a universal memory, replacing DRAM in computer main memory and flash memory in solid-state drives. However, the research has been conducted on relatively large-sized single-bit memory cells. As long ago as 2006 Nantero reported a 22nm NRAM switch based on the carbon nanotube principle.

The lasted research, conducted by a research team under Ken Takeuchi, a professor at Chuo University in Japan, jointly with Nantero, investigated programming methods for a 140nm single bit CNT-based memory. This showed that set and reset operations are possible with pulses of less than 20ps and less than 20-microamps. It is also claimed that with an on/off resistance ratio of greater than 100, the memory has the potential for multi-bit storage in a single cell. Set/reset endurance cycling of 10^11 cycles, was reported.

Further evaluation of gigabit arrays at 10nm geometry is needed, Nantero said.

Cross-sectional views of NRAM memory cell. Source: Nantero.

Nonetheless, the results show the NRAM could be applied to equipment ranging from smartphones to enterprise servers while contributing to higher performance and more robust IT systems that consume less power.

The research was reported in a paper titled "23% Faster Program and 40% Energy Reduction of Carbon Nanotube Non-volatile Memory with Over 10^11 Endurance" at the 2014 Symposia on VLSI Technology and Circuits, which ran from June 9 to 13, 2014, in Honolulu, Hawaii.

The NRAM cell consists of thin film made of a matrix of carbon nanotubes sandwiched between metal electrodes. When a voltage is applied to the cell, many rod-shaped CNTs, which are separate from one another, make contact and because of atomic-scale forces adhere to one another. This increases the number of conductive paths between the electrodes and lowers the resistance. A reset pulse is used to break the bonds and return the matrix to its high resistance state.

Nanotero has been researching the use of CNTs for non-volatile memory since its formation in 2001 and in September 2013 announced the closing of a $15 million Series D round of financing that included Schlumberger as an investor.

Related links and articles:

News articles:

Samsung Pushes Vertical NAND to 32 Layers

ST Turns to ReRAM for 28nm Embedded Memory

Embedded ReRAM Gets Into Distribution

Crossbar Funding Moves ReRAM Closer to Market

ARM Support Claimed for Non-Filamentary ReRAM

Micron Drops Phase-Change Memory – for Now

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