Lawrence Berkeley National Laboratory researchers claim the world’s first fully two-dimensional field-effect transistor (FET), which—unlike conventional FETs made from silicon—suffers no performance drop-off under high voltages and provides high electron mobility, even when scaled to a monolayer in thickness.
The 2-D field-effect transistor is made up layers of molybdenum disulfide, hexagonal boron nitride and graphene held together by van der Waals bonding.
"Our work represents an important stepping stone towards the realization of a new class of electronic devices in which interfaces based on van der Waals interactions rather than covalent bonding provide an unprecedented degree of control in material engineering and device exploration," said Ali Javey, a faculty scientist in Berkeley Lab’s Materials Sciences Division and a UC Berkeley. The 2-D transistor exhibited n-type behavior with an ON/OFF current ratio of >106, and an electron mobility of 33 cm2/V·s.
FETs, one of the pillars of the electronics industry, accept an electrical signal through one electrode, which creates an electrical current throughout the device. Ubiquitous to virtually every electronic device, FETs are susceptible to degradation in charge-carrier mobility, especially at high electrical fields.
Javey and his team fabricated their 2-D FETs using the transition metal dichalcogenide molybdenum disulfide as the electron-carrying channel, hexagonal boron nitride as the gate insulator, and graphene as the source, drain and gate electrodes. All of these constituent materials are single crystals held together by van der Waals bonding (van der Waals forces are the sum of the attractive or repulsive forces between molecules).
"The van der Waals bonding of the interfaces and the use of a multi-step transfer process present a platform for making complex devices based on crystalline layers without the constraints of lattice parameters that often limit the growth and performance of conventional heterojunction materials. The results demonstrate the promise of using an all-layered material system for future electronic applications," said Javey.
For the 2-D FETs produced in this study, mechanical exfoliation was used to create the layered components. Javey and his team will look into growing these heterogeneous layers directly on a substrate. They will also look to scale down the thickness of individual components to a monolayer and the lengths of the channels to molecular-scale dimensions.
The U.S. Department of Energy’s Office of Science funded the research, which is detailed in ACS Nano.
Related stories:
-
Scalable Process Pushes Graphene Applications
- Researchers Transform Infrared Light Into Graphene Plasmons
-
Researchers Extend 3-D Imaging Range for Consumer Apps
-
Hybrid Carbon Nanostructures Could Lead to Better Ultracapacitors
-
World's Thinnest LED Is Three Atoms Thick
-
IBM Makes Most Advanced Graphene IC