Semiconductors and Components

Chip Packaging Materials Market to Post Modest Growth

20 January 2014

Declining prices will result in slow growth for semiconductor packaging materials as revenue increases from about $19.3 billion in 2013 to $21 billion in 2017, according to a new study by fab tool vendor trade group SEMI.

Most packaging material segments have weak revenue growth as end users seek lower cost solutions for packaging resulting in severe downward price pressure, the study said. In addition, the transition to copper and silver bonding wire has reduced the impact of gold metal pricing in wire bond packages.

However, several packaging materials segments will post stronger growth that others. Organic substrates will remain the largest segment of the market growing from about $7.4 billion in 2013 to more than $8.7 billion by 2017, SEMI said.

Strong growth in mobile computing and communications devices, such as smart phones and tablets, is driving wafer level packages (WLPs) and dielectric materials. Flip-chip adoption continues to expand the market for underfill materials.

The report, titled "Global Semiconductor Packaging Materials Outlook," covers laminate substrates, flex circuit/tape substrates, leadframes, bonding wire, mold compounds, underfill materials, liquid encapsulants, die attach materials, solder balls, wafer level package dielectrics and thermal interface materials.

The report also identifies technology and business trends in the packaging materials market including:

  • Thinner substrates for packages in mobile products and leading-edge chip-scale package substrates to handle fine bump pitch of ≤110 µm.
  • Alternatives to the epoxy or acrylic resin for thermal interface materials, including filler technologies such as carbon nanotubes.
  • Softer palladium-coated copper wire for circuit under pad applications.
  • Low moisture level sensitivity mold compounds and encapsulants for bare copper and silver alloy wire.
  • Die attach film materials with thickness 10 µm and under.
  • No-flow underfill materials.
  • Continued trend of lead-free solder balls for ball grid array and chip-sale packages, and smaller diameter balls for WLP.
  • Wafer-level package dielectrics with low temperature cure, lower dielectric constant, and lower cost.

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