Marvell Technology Inc. has demonstrated what it claims is the first 2 nm silicon intellectual property (IP) for XPUs, switches and other cloud technology.
The technology will be produced on TSMC’s 2 nm semiconductor process technology for custom silicon projects. Marvell said the custom silicon market is projected to experience a total available market growth of 45% annually and account for about 25% of the advanced compute market by 2028.
Marvell said its portfolio of semiconductor IP serves as building blocks for developing custom AI accelerators, CPUs, optical DSPs, high performance switches and other technologies. This portfolio includes:
- Electrical and optical serializer/deserializers (SerDes)
- Die-to-die interconnects for 2D and 3D devices
- Advanced packaging technologies
- Silicon photonics
- Custom high-bandwidth memory (HBM) compute architecture
- On-chip static random-access memory (SRAM)
- System-on-chip (SoC) fabrics
- Compute fabric interfaces such as PCIe Gen 7
About the IP
Marvell said it delivered a 3D simultaneous bi-directional I/O operating at speeds up to 6.4 Gbits/second for connecting vertically stacked die inside of chiplets. The company said this shift to bi-directional I/O gives designers an increased bandwidth by up to two times and reduces the number of connections by 50%.
3D simultaneous bi-directional I/O will give chip designers greater flexibility in design and help to increase transistor count with an estimated 30% of all advanced node processors expected to be based around chiplet designs — or multiple chips combined into the same package.
