Electronic Design Automation

Embedded World 2025: RISC-V SoC IP collaboration

26 February 2025

Baya Systems and Semidynamics are collaborating on the development of RISC-V intellectual property (IP) cores for next-generation system-on-chip (SoC) platforms for AI, machine learning and high-performance computing (HPC) applications.

The deal will integrate Semidynamics family of 64-bit RISC-V processor IP cores with Baya Systems’ WeaveIP network on chip (NoC) IP. The companies will showcase their development at the upcoming Embedded World 2025 tradeshow next month.

WeaveIP gives high-bandwidth and low-latency data transport for modern workloads, Baya Systems said. The IP includes its software-driven WaverPro platform for system-level optimization. The goal is to address challenges of AI and machine learning in market segments such as:

  • Data centers
  • Infrastructure
  • Automotive
  • Edge IoT

As these systems shift to larger scales and chiplets, it will move from raw compute power to efficient data transfer between processors and chiplets.

The collaboration comes after Baya Systems finished its Series B funding used to further its NoC development.

Embedded World 2025 takes place March 11-13 in Nuremberg, Germany.

To contact the author of this article, email PBrown@globalspec.com


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