Samsung Foundry has successfully taped out a 5G networking system-on-chip (SoC) design on Samsung’s 5LPE process using Cadence Design Systems Inc.’s Quantus Extraction Solution and Tempus Timing Solution.
According to the electronic design automation (EDA) vendor, the software allowed Samsung to achieve a two times productivity boost that led to a faster design closure compared to previous design methodology.
Samsung used the Tempus software along with the Cadence Innovus Implementation System for faster convergence and closure as well as a reduction in project timeline, the company said. Additionally, the Tempus software:
- Enables hierarchical design closure
- Reduces machine and memory demands
- Curtails overall runtime
“The successful tapeout of our SF5A design for 5G networking was a significant milestone for our team, and the enhanced efficiency and reduced runtime afforded by the Cadence Quantus Extraction Solution and Tempus Timing Solution are a testament to the power of innovation and collaboration between the Cadence and Samsung teams,” said Sangyun Kim, VP and head of foundry design technology team at Samsung Electronics.