Electronic Design Automation

Securing ASICs, SoCs and FPGAs with QSE IP

04 December 2023

Rambus Inc.’s quantum safe engine (QSE) intellectual property (IP) can now be added into hardware security elements in ASICs, system-on-chips (SoCs) and field programmable gate arrays (FPGAs).

The QSE IP protects these chips from hackers breaking asymmetric encryption using quantum computers. The IP supports the National Institute of Standards and Technology (NIST) draft standards for quantum-resistant algorithms (FIPS 203 ML-KEM and FIPS 204 ML-DSA), and provides SHA-3, SHAKE-128 and SHAKE-256 acceleration.

This allows users to protect data centers and government hardware against sophisticated hackers that are emerging in the post-quantum computing era, Rambus said. Additionally, Rambus can offer a differential power analysis (DPA) version for more protection against DPA attacks.

“Quantum computers will provide individuals and organizations the exponential speed- up and compute power needed to solve some of today’s most complex problems, including the ability to decrypt current data encryption algorithms,” said Heather West, PhD, research manager of Quantum Computing Research at IDC. “Implementing quantum-resistant cryptography now is key for organizations to protect their past, current and future data from quantum computing enabled attacks.”

The QSE IP is available as a standalone cryptographic core or can be integrated into Rambus’ quantum safe root of trust IP as part of a larger hardware security solution.

To contact the author of this article, email GlobalSpecEditors@globalspec.com


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