Intel Corp. has revealed that its Agilex 7 with the R-Tile chiplet is now shipping in volume, containing the first field programmable gate array (FPGA) with PCIe 5.0 and CXL capabilities.
The FPGA also features hard intellectual property (IP) supporting these interfaces.
The Agilex 7 with R-Tile allows users to connect the FPGAs with processors to accelerate targeted data center and high-performance computing workloads. The FPGAs are configurable and scalable allowing users to deploy custom technology to reduce overall design costs and development processes, Intel said.
The FPGAs feature two times faster PCIe 5.0 bandwidth and four times higher CXL bandwidth per port compared to other FPGA products, Intel said.
Adding CXL memory to Intel’s Xeon-based servers improves Linux performance by up to 18%, according to a study from the University of Michigan. Other research demonstrated CXL-enabled smart memory node increased performance on Intel 4th Gen Xeon cores for HPC workloads by more than two times.
