Intel Corp. has introduced a new family of field programmable gate arrays (FPGA) designed specifically to address data-centric business challenges for embedded, network and data center markets.
The Agilex family combines an FPGA fabric built on Intel’s 10 nm process with heterogeneous 3D session initiation protocol (SiP) technology. This allows for the integration of analog, memory, custom computing, custom I/O and Intel application-specific integrated circuit (ASIC) device tiles into a single package with the FPGA fabric.
The device allows for a migration path from FPGA to structured ASIC to provide solutions for future data center solutions. Intel said the second generation HyperFlex architecture provides up to 40% higher performance or up to 40% lower total power compared with Intel’s Stratix 10 FGPAs.
The Agilex family also includes what Intel claims is the first industry FPGA to support Compute Express Link, a cache and memory coherent interconnect to future Intel Xeon Scalable processors. Other features include hardened BFLOAT16 and up to 40 teraflops of digital signal processor (DSP) performance; peripheral component interconnect express (PCIe) generation 5; and support for DDR5, HBM and Intel Optane DC persistent memory.