To accelerate the verification and pre-silicon software validation of its system-on-chip (SoC) designs for 5G RAN applications, Picocom has deployed Cadence Design Systems Inc.’s Palladium Enterprise Emulation Platform.
Using the platform, Picocom can achieve faster hardware and software integration, experiencing an emulation speedup of 1,000 times compared with RTL simulation.
Additionally, the emulation software gives Picocom the ability to bring up system software on RISC-V cores in advance of silicon being available. Picocom was able to predictably compile and able to quickly debug its design.
The Palladium software is part of Cadence’s verification suite that supports the company’s Intelligent System Design strategy. The suite is comprised of core engines and verification fabric technologies that increase verification throughput and design quality, fulfilling verification requirements for applications and vertical segments.