Cadence Design Systems Inc. has expanded its Tensilica Vision digital signal processor (DSP) product family with the debut of two new DSP IP cores for embedded vision and artificial intelligence (AI). Packing an industry-leading 3.8 tera operations per second (TOPS), the flagship Cadence Tensilica Vision Q8 DSP delivers two times performance and memory bandwidth compared to the Tensilica Vision Q7 DSP and energy efficiency for high-end vision and imaging applications in the automotive and mobile markets. The Tensilica Vision P1 DSP is optimized for always-on and smart sensor applications in the consumer market, providing an energy-efficient solution.
There has been strong customer interest in the Vision Q8 and Vision P1 DSPs, with several evaluations underway. The new DSPs round out Cadence’s comprehensive portfolio of proven vision and AI DSPs, 
offering customers even greater design flexibility with best-in-class technology.
The systems feature an N-way programming model that preserves software compatibility for an easy migration from prior-generation Tensilica Vision DSPs with different single instruction, multiple data widths. Like the rest of the Tensilica Vision DSP family, the Vision Q8 and Vision P1 DSPs support Tensilica Instruction Extension (TIE) language, allowing customers to customize the instruction set. Both DSPs also support Xtensa Neural Network Compiler (XNNC) and the Android Neural Networks API (NNAPI) for neural network support. In addition, they support more than 1700 OpenCV-based vision library functions, OpenCL and the Halide compiler for computer vision and imaging applications. Both cores are automotive ready with ASIL B hardware random faults and ASIL D systematic fault certification.
