Memory and Storage

Western Digital develops fifth generation 3D NAND

02 February 2020

The 3D NAND chip in development. Source: Western DigitalThe 3D NAND chip in development. Source: Western DigitalStorage vendor Western Digital has successfully developed its fifth-generation 3D NAND technology built on triple-level-cell (TLC) and quad-level-cell (QLC) infrastructure.

The technology, called BiCS5, allows for high capacity and improved performance for applications such as connected cars, mobile devices and artificial intelligence.

Western Digital has begun initial production of BiCS5 TLC in a 512 gigabit chip and is shipping consumer products built on the technology. Commercial volumes are expected in the second half of 2020 and BiCS5 TLC and BiCS5 QLC will be available in a range of capacities including 1.33 terabit.

Using 112 layers of vertical memory capability, the 3D NAND technology offers up to 40% more bits of storage capacity per wafer compared to Western Digital’s 96-layer BiCS4 technology. Design enhancements also accelerate performance to offer up to 50% faster I/O performance compared to BiCS4, Western Digital said.

To contact the author of this article, email engineering360editors@globalspec.com


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