The “end-to-end transmitter-receiver” chip boasts a unique architecture combining digital and analog components on a single platform, resulting in ultra-fast data processing and reduced energy consumption. Source: Steve Zylius / UCIA team of electrical engineers from the University of California, Irvine (UCI) tackled the question of whether wireless systems are capable of the same high performance and speeds achieved with fiber-optic networks. The result is a 4.4 mm2 wireless silicon chip that boosts radio frequencies into the 100 GHz range, four times the speed of the 5G wireless communications standard. For this reason, the team describes the chip as "beyond 5G."
The demand for transceivers and receivers to handle high-frequency data communications is increasing thanks to a growing interest in wireless technology applications including the internet of things, autonomous vehicles and streaming high-definition video.
The chip's creators from UCI's Nanoscale Communication Integrated Circuits (NCIC) Labs call it an "end-to-end transmitter-receiver." Its unique digital-analog architecture allows for greater energy efficiency as well as faster processing. This combination makes it attractive for adoption throughout the consumer electronics market. “Our innovation eliminates the need for miles of fiber-optic cables in data centers, so data farm operators can do ultra-fast wireless transfer and save considerable money on hardware, cooling and power,” said study co-author Huan Wang.
According to senior author Payam Heydari, NCIC Labs director and UCI professor of electrical engineering and computer science, integrated circuit engineers have begun to see the physical limitations of the traditional digital processing approach. “Moore’s law says we should be able to increase the speed of transistors — such as those you would find in transmitters and receivers — by decreasing their size, but that’s not the case anymore,” he said. “You cannot break electrons in two, so we have approached the levels that are governed by the physics of semiconductor devices.”
Heydari's team used a chip architecture that modulates the digital bits in the analog and radio-frequency domains as a way to significantly relax digital processing requirements.
The work is outlined in a paper published recently in the IEEE Journal of Solid-State Circuits.
