Medical Devices and Healthcare IT

Researchers Develop SoC for Fully Implantable Cochlear Device

11 February 2014

Researchers from Massachusetts Eye and Ear, Harvard Medical School and the Massachusetts Institute of Technology (MIT) have designed a prototype system-on-chip (SoC) for a fully implanted cochlear implant.

"Our long-term goal is to develop a fully implantable cochlear implant. To facilitate that development, we have developed the SoC and tested it in ears of human cadavers," said Konstantina Stankovic, who co-led the study with Anantha Chandrakasan, MIT head of electrical engineering and computer science.

Existing versions of a conventional cochlear require a disk-shaped transmitter about an inch in diameter be affixed to the skull, with a wire snaking down to a joint microphone and power source that looks like an oversized hearing aid around the patient's ear.

MIT researchers developed a low-power signal-processing chip that does not need external hardware and could be wirelessly recharged in about two minutes and run for about eight hours on each charge.

"The idea with this design is that you could use a phone with an adapter to charge the cochlear implant, so you don't have to be plugged in," said Chandrakasan, "Or you could imagine a smart pillow, so you charge overnight, and the next day it just functions."

Existing cochlear implants use an external microphone to gather sound, but the new implant would instead use the natural microphone of the middle ear. Delicate bones in the middle ear, known as ossicles, convey the vibrations of the eardrum to the cochlea, the small, spiral chamber in the inner ear that converts acoustic signals to electrical impulses.

In operation, a middle-ear implant consists of a tiny sensor that detects the ossicles' vibrations and an actuator that helps drive the stapes—one of the ossicles—with enough force to stimulate the auditory nerve. Lowering the power requirements of the converter chip was key to dispensing with the skull-mounted hardware, according to Chandrakasan, whose lab at MTL specializes in low-power chips.

To conserve even more power, the researchers tailored the arrangement of low-power filters and amplifiers to the precise acoustic properties of the incoming signal. In addition, Chandrakasan and his colleagues developed a new signal-generating circuit that reduces the chip's power consumption by an additional 20 to 30 percent by using a power-efficient waveform to modulate the encoded acoustic information while stimulating the auditory nerve as needed.

A paper detailing the research and development work will be presented Feb. 11 at the IEEE International Solid State Circuits Conference in San Francisco.

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