Semiconductor Equipment

New capabilities introduced for integrated circuit verification platforms

09 August 2022

Recent announcements from Siemens have introduced new functionality to both Calibre and Symphony, two of the company’s integrated circuit (IC) verification platforms.

Calibre shifts left

For Calibre, Siemens has taken a “shift-left” concept — a term used to describe the movement of tasks such as identification, analysis and resolution of verification issues into earlier stages of development. Expanded electronic design automation (EDA) early design verification functionalities have been engineered for the Calibre platform to help IC design teams and companies get more quickly to tapeout — the final stage of the process before the design for the circuit can be sent to a fabrication facility for manufacturing.

Siemens has introduced new early design verification functionalities to its Calibre platform. Source: SiemensSiemens has introduced new early design verification functionalities to its Calibre platform. Source: SiemensAs the company notes, identification and resolution of issues earlier in the design cycle can not only help compress the overall verification cycle, but also provide more time and opportunity to improve final design quality. By providing tuned check support for early-stage analysis, verification and optimization strategies using qualified signoff requirements, enhancements like these can support streamlined design processes, improved designer productivity and reduced time-to-market.

Symphony goes “Pro”

For Symphony, Siemens has introduced a new Symphony Pro platform that extends existing mixed-signal verification capabilities. The Pro platform supports new and advanced standardized verification methodologies developed by Accellera, a standards organization focused on EDA and IC design and manufacturing, with an intuitive visual debug cockpit designed to significantly improve productivity.

As the company notes, next-generation automotive, imaging, IoT, 5G, computing and storage applications are driving strong demand for greater analog and mixed-signal content in next-generation systems-on-chip (SoCs). Mixed-signal circuits, which enable lower power, area and cost with improved performance, are becoming increasingly ubiquitous: They are used for integrating the analog signal chain with the digital-front end (DFE) in 5G massive-MIMO radios, digital RF-sampling data converters in radar systems, image sensors combining analog pixel readout circuits with digital image signal processing, and feeding data center computing resources with more data through PAM4 signaling.

In addition, the increased application of digital control, digital calibration and digital signal-processing techniques in mixed-signal chip architectures is driving a paradigm shift toward more digital-centric approaches for mixed-signal verification methodologies. The new Symphony Pro platform extends the industry-standard techniques of Universal Verification Methodology (UVM) and Unified Power Format (UPF) into the mixed signal domain.

For more information about these platform enhancements, visit Siemens.

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