Industrial Electronics

Arasan Chip Systems announces second generation Sureboot QSPI IP

19 August 2021

Arasan Chip Systems, a provider of total IP solutions for systems on a chip applications, has announced the availability of its formally verified Sureboot quad serial peripheral interface (QSPI) IP. The silicon proven QSPI NOR flash memory controller IP is an extended version of the SPI protocol allowing the use of four data lanes leading to highly effective overall bandwidth. Source: Arasan Chip SystemsSource: Arasan Chip Systems

Arasan’s QSPI IP provides the user immediate access to flash memory from SPI mode on startup, or alternatively it can be configured for any other mode from SPI to dual SPI or quad SPI. Additionally, a direct memory access command may be issued to copy memory from the flash device to anywhere else on the bus.

The QSPI host controller is compliant with AMBA AXI3/4 and AXI4-lite protocols, and an advanced peripheral bus control port interface is available if desired instead of the AXI4-lite control port interface.

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