Say "power regulation" and the knee-jerk reaction of many designers is "switching regulator." After all, why accept the generally lower efficiency of the LDO (low dropout regulator) in comparison to that of a switcher?
The reality, though, is that for many situations the higher efficiency is not the priority performance parameter. Even though LDOs do have lower efficiency in many (but not all) configurations compared to a switching regulator, they offer better performance in other ways. That's why billions of LDOs are used annually spanning low-end applications, where they are a cost-effective, easy-to-use solution, all the way to high-end, leading-edge designs where their inherent low noise, superior transient response, and high power supply rejection ratio (PSRR) are critical factors.
Two new LDO families from Analog Devices offer tangible evidence of the viability of tailored LDOs for well-defined applications. The ADP1763 and ADP7159 families of LDOs target high data-rate applications that are extremely sensitive to any noise on the DC rail, such as RF transceivers, voltage-controlled oscillators, phase-locked-loop synthesizers, clocks and high-speed A/D and D/A converters. In these designs, even tiny amounts of noise can degrade the performance of the system and prevent the more costly, critical and complex components from achieving their data-sheet potential. Targeted applications include communications infrastructure, such as backhaul and microwave links, which demand cleaner signals to achieve higher-rate, low-error data links. See Figure 1.
The ADP1763 family, with 3-A maximum output current, is available with fixed-output voltages ranging from 0.9 V to 1.5 V, as well as an adjustable output model whose output can be set between 0.5 V and 1.5 V using an external resistor. It operates from an input supply as low as 1.10 V and up to 1.98 V.
What really stands out are the ultralow-noise specifications: 2 μV rms from 100 Hz to 100 kHz, with noise spectral density of 4 nV/√Hz at 10 kHz and 3 nV/√Hz at 100 kHz. Dropout voltage is also low, at 115 mV (typical) at 3 A load; operating supply current is 4.5 mA (typical) at no load. Tolerance is tight, with fixed-output voltage accuracy of −1.8% to +1.5% over line, load and temperature range. The ADP1763 is available in a small 16-lead LFCSP package.
The ADP7159 family is a series of adjustable linear regulators that deliver up to 2 A of output current, at output voltages from 1.2 V to 3.3 V, depending on the model. The devices use a proprietary architecture for high power-supply rejection and ultralow noise, and also provide excellent line and load transient response, while using only a low-cost 10 µF ceramic capacitor on the output.
Total integrated noise is 0.9 µV rms from 100 Hz to 100 kHz, and 1.6 µV rms from 10 Hz to 100 kHz; noise spectral density is 1.7 nV/√Hz from 10 kHz to 1 MHz. PSRR is 68 dB from 1 kHz to 100 kHz, and 45 dB at 1 MHz. Dropout voltage is typically 200 mV typical at VOUT = 3.3 V and IOUT = 2 A. The ADP7159 is available in 10-lead, 3 mm × 3 mm LFCSP and 8-lead SOIC packages.
As with all LDOs, their simplicity and ease of use does not mean they don’t have substantial data and "secrets" to reveal, or that users are not concerned about all performance dimensions of these basic regulators. The data sheets for these devices are comprehensive—19 pages for the ADP1763 and 23 pages for the ADP7159—with dozens of graphs detailing performance across multiple dimensions and parameter settings.
For example, the ADP1763 data sheet shows junction temperature calculations for different ambient temperatures, load currents, VIN to VOUT differentials, and areas of PCB copper, with Figure 2 as just one example of the many such figures provided. The vendor also provides an evaluation board, Figure 3, and an associated thermal image of the evaluation board operating at 3 A, Figure 4; similar results are provided for the ADP7159 as well.