The trend toward lower power for embedded systems has been forcing changes to system architecture and component features for over a decade. This trend has been driven by the desire to reduce size, lower cost and improve convenience. Battery operation has been a critical requirement in keeping this trend going. Device manufacturers responded with new devices operating at lower voltages and with power saving features to extend battery based systems operating lifetimes. However, we are now at a transition point where ‘just’ lower power is not enough. Users now require more features and higher performance without reducing operating lifetime. We have entered a realm where power efficiency is the key driver for system and device innovation. This is the only way to provide more features and performance at the same or lower power levels.
Battery operation changed some fundamental aspects of architecting a MCU-based embedded system. One of the most critical aspects of battery operation is that the battery voltage can drop over time. Embedded systems are needed to provide power regulation or operate at lower voltages. MCUs are adapted to this requirement by offering multiple operating voltages. At higher voltages, higher performance was possible. At lower voltages, MCUs would operate at a lower frequency. System architects adapted to this new approach by reducing system capabilities when power was running low. Perhaps fewer sensor measurements were captured or data was logged less often. Usually there were ways like this to adjust performance. With rechargeable devices, or those powered via energy harvesting, when additional power became available, performance could then be increased.
One of the most powerful innovations for lower power operation was the addition of special low power operating modes. Operating modes such as ‘wait’ and ‘sleep’ could put the high power portions of the MCU, CPU and its associated memories into a lower power state when they were not needed. For example, if the application was capturing data every millisecond instead of putting the CPU into a power burning ‘loop’, you could gate the clock to the CPU and enter a lower power ‘wait’ mode. If an even lower power was required, you could remove power from the CPU and enter a ‘sleep’ mode. Even when running, the CPU could use a lower clock rate to reduce dynamic power during periods of low activity. When more processing was required, for example, when a captured signal needed to be filtered, the clock rate could be increased.
Power Efficiency - Your Trump Card
Example of an event system - Atmel XMEGA MCU. Source: AtmelModern MCUs have added significant new capabilities that allow designers to ‘do more with less’. Many of these innovations involve adding capabilities outside of the CPU. When the CPU can avoid doing work, the system can save a significant amount of power without diminishing performance. One of the most successful innovations has been the addition of intelligent peripherals. This new classes of peripherals can operate autonomously from the CPU and often at performance rates that surpass that availability under CPU control. For example, intelligent analog to digital converters ports can have a timer trigger a data capture, a DMA controller move the data to a buffer and then repeat this process until the buffer is full. Only then does the CPU need to be activated to process the full data buffer. Communications ports can operate in autonomous modes as well and need only activate the CPU when an error condition occurs, or when data is ready for processing. Some MCUs have the ability to ‘link’ multiple events to add autonomy where it is needed. The Atmel XMEGA MCU family event system is illustrated on the left. A variety of events are routed from the source to the destination using a general purpose event system ‘routing’ network. The result of an event action can even be used as an event source to ‘loop’ functions until they are completed.
Another approach to implementing autonomous activity is to add more CPU cores. This may seem counterproductive if we are trying to minimize the 
Dual Core CPUs Optimized for Different Tasks. Source: NXPamount of time a CPU is active. However, by having more than one CPU core we can allocate processing performance when and where it is required. For example, it is better to use a small efficient CPU core for processing communications traffic instead of a power hungry computationally optimized CPU core. Once traffic is organized the small core can ‘sleep’ while the processing core quickly and efficiently processes the data. This approach is implemented in the NXP LPC43xx MCU where a high performance ARM Cortex-M4 CPU core is combined with a power efficient ARM Cortex-M0 CPU core. The Cortex-M0 processor can be used for system control and management functions while the Cortex-M4 processor is used as the main data processing engine. Each CPU can be put in a low power ‘wait’ or ‘sleep’ mode when not needed to further boost power efficiency.
Tools Help Improve Efficiency Too
Power Optimization during Debug - IAR i-scope in Action. Source: IARAchieving challenging power efficiency goals can be the most difficult part of an embedded system design so MCU manufacturers and tool vendors have responded with new capabilities to assist in the power optimization process. Advanced code development and debug tools can now provide the ability to profile code execution and power consumption during execution. Some tools use ‘data sheet’ power numbers to show results during software debug while other tools can actually measure the power consumed by the MCU during execution on the actual target hardware. IAR Systems power debugging i-scope tool when combined with the hardware debugging I-jet probes can provide a detailed look of the execution profile and power use during execution. This level of detail allows the designer to better optimize MCU operations for improved power efficiency.
Energy Harvesting
Another approach to energy efficiency is to augment battery operation with energy harvested from the environment. Solar harvesting is a familiar technology, but new approaches allow energy to be harvested from mechanical vibration, thermal differences and changes in pressure. In many applications, embedded systems will be able to use these effects to recharge batteries or to operate in emergencies when the power source is not available. MCUs are often the systems controller for energy harvesting system and they can use many of the power efficiency techniques previously described to implement this function in a power efficient manner. You certainly do not want the control system using up a majority of the power harvested!
Conclusion
Users are increasingly demanding of their embedded systems. They want smaller size, lower cost, improved features and performance all without sacrificing battery operating lifetime. MCUs have moved beyond a single-minded focus on low power and have embraced power efficiency as the way to deliver on all the demands made on embedded systems. Intelligent independent peripherals, serializing system interfaces, efficient use of low power modes and new tools that help optimize power are just the first wave of these power efficiency innovations. If these initial responses by MCU manufacturers are any indication, the next wave of power efficiency innovations promises to be even more impressive.
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