Supply Chain Management

ARM Upgrades IDE Analysis for MCUs, RTOS

03 December 2013

ARM Holdings plc (Cambridge, England) has extended the capability of the DS-5 Streamline software analysis tool so that it can be applied to code operating under RTOS and on Cortex-M series cores.

Streamline was brought in as part of the introduction of ARM's DS-5 integrated development environment (IDE) to help analyze code for system-on-chips (SoCs) that would host Linux and Android operating systems. These tended to be Cortex-A based multicore SoCs developed for mobile applications.

"Streamline allows software developers to look at CPU core utilization, branching, cache performance. It also looks up into the Linux kernel and can look into the Mali GPU, into the frame buffer," said Guilherme Marshall, product manager in the system design division at ARM. "It provides at-a-glance visualization of whether software is CPU bound or GPU bound and of how to re-optimize software to make better use of resources."

ARM is now extending that capability to microcontroller development. "MCUs are starting to go multicore, and developers need better tools to help understanding. We are bringing Streamline down to the Cortex-M range, specifically Cortex-M3 and Cortex-M4 based devices," Marshall said.

The last few months have been spent building an awareness of real-time operating system requirements, Marshall said. These are addressed via an application programming interface (API). “Streamline support is there for Keil RTX, and an open API has been created to enable usage with other RTOSs. However, built-in support for “FreeRTOS, ThreadX from ExpressLogic and uCOS from Micrium” (among other RTOSs) exists in the Debugger component only," said Marshall.

Streamline does require connection to the target hardware, but it does not depend on ETM trace cores. Although these provide zero intrusiveness in analysis and are an option, they come at a cost of die area and are likely to be left out of cost- and power-sensitive MCU applications, said Marshall.

Instead, for RTOS/MCU applications, the low-intrusion ITM instrumentation core can be used. Although this resides in the CPU core, the use of the API allows other information about the use of peripherals to be captured.

One crucial aspect of low-power design is stepping cores down through sleep modes and back up again. Done correctly, it can be a major contributor to low-power design. However, because of the need to connect the Streamline analyzer to the CPU core, there is the possibility of losing control of the CPU. "Sleep is one of the things we are still working through," said Marshall.

DS-5 comes as a community edition downloadable for free including compiler, debugger and Linux version of Streamline. To receive the MCU/RTOS version, developers must upgrade to the professional version of DS-5 at a cost of $6,000 per node-locked seat. Users should also contact ARM's system design division to make sure their chosen hardware is available on a probe board or for support if the team is developing a custom IC.

Software correctness and efficiency are becoming key as the Internet of Things drives the use of MCUs. Although ARM has very direct support for MCUs through its Keil development tools, there are a significant number of designs in which MPUs (Cortex-A), graphics (Mali) and MCUs (Cortex-M) are being deployed together and must work with each other, said Marshall.

Marshall said users should expect support to extend to lower-order Cortex-M series cores over time.

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