The Heterogeneous Systems Architecture (HSA) Foundation has published its initial specification, HSA1.0, claiming it will enable more efficient and more distributed processing in platforms ranging from mobile devices up to high-performance computing and servers.
The specification—more than two-years in the making—comprises structures and definitions that improve the programmability of heterogeneous processors—including GPUs, DSPs and hardware accelerators—the portability of programming code and interoperability across different vendor devices. It should make for easier programming of heterogeneous multicore processor systems using programming languages such as C/C++, Java and Python and programming environments such as OpenCL.
The HSA Foundation was initiated by Advanced Micro Devices Inc. and launched in 2012 with AMD, ARM, Imagination, MediaTek, Qualcomm, Samsung and Texas Instruments as founding members. Its membership now includes 43 technology companies and 17 universities. The most notable absentee from any mention on the group's website is Intel Corp. The initiative is CPU, GPU and DSP agnostic and is trying to develop standards that will let multiple architectures co-operate in silicon.
"This unleashes hardware and software and will allow applications to develop; videochat type applications can be more efficient on shared memory, other examples include video search, and embedded SDN—software defined networking," Phil Rogers, president of HSA and AMD fellow, told Electronics360.
The specification divides into three modules of work that are aimed at SoC hardware developer, compiler writers and application developers:
The HSA System Architecture Specification defines how the hardware operates and includes such things as cache coherence, memory model, signaling and fault handling.
- The HSA Programmers Reference Manual (PRM), targets the software ecosystem, tool and compiler developers and includes the HSA virtual instruction set architecture HSAIL and BRIG, the compiler format
- The HSA Runtime Specification defines how applications interact with HSA platforms and covers such things as initialization, resource discovery, queue creation.
- HSA is also working on conformance tests to be released in the second quarter of 2015.
The HSA is written on the assumption of cache coherence on a given node but not between nodes, which can communicate using message passing. "Of course, it all depends on how you define a node," said Rogers, adding that it would usually be convenient to take a node to be a motherboard for a client computer or a server blade. It is the impact of Moore's Law allowing multiple CPUs and GPUs at this level of system integration that has created the need for a multi-architecture standardization.
The benefits are expected to include single-source programming, elimination of data copies thereby saving power consumption and standardized command submission to GPUs.
A development within multiprocessor computer theory is the idea that is more energy efficient to assign tasks to the processor nearest to the data concerned than to move the data to the processor to which a task has been assigned. Rogers said: "This has been anticipated by HSA. HSA 1.0 does not set rules about data locality. But we are looking at this at AMD."
Similarly, the structure provided by HSA 1.0 could help stimulate the creation of novel processor architectures, Rogers said. The example was given of deep learning neuromorphic processors used for image and audio processing and search and recognition functions. "Does HSA 1.0 anticipate it? Yes, You could create such a machine and have it work very well in an HSA node, although HSAIL may not be applicable.
The specification introduced during the HSA 1.0 launch event held at the Fairmont Hotel in San Jose, Calif. on Monday March 16. The event featured a panel discussion between HSA founding members. A developer panel discussing software, the ecosystem and applications in the mobile, PC, and HPC computing was also featured. The group is already working on HSA Specification 1.1 to standardize tool APIs for debugging and profiling code and a book.
"Qualcomm Technologies Inc. is developing new, low power, heterogeneous computing technologies for Qualcomm Hexagon DSP, Qualcomm Adreno GPU and custom CPU micro architectures. We believe that application developers for mobile and 'Internet of Everything' devices, can deliver innovative experiences on Qualcomm Snapdragon processors if certain aspects of heterogeneous computing are standardized," said Tim Leland, vice president of product management at Qualcomm Technologies Inc., in a statement issued by the HSA Foundation.
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