Electronics and Semiconductors

ARM Adds Safety File to Cortex-R5 Processor

22 January 2015

To help ARM make progress in automotive design wins the company has produced a documentation set to help downstream suppliers meet the requirements of the ISO-26262 functional safety standard.

The adoption of ISO-26262 and the move to much greater use of software in vehicles has increased the amount of documented and provable safety evaluation that must be done by car makers, and each party in the value chain increasingly depends on their upstream suppliers to provide support.

The Cortex-R5 processor core is an ARM processor with real-time control attributes that is used for embedded applications in SoC and microcontroller form. Licensees include Texas Instruments, Scaleo and Spansion. It has a number of fault detection, and data capture features including error-correcting code (ECC) on level 1 cache memory, memory protection unit and support for dual-cores processing in lock step (DCLS). The safety documentation file details this and presents the information in a format that can be used by licensees when building their safety assessment files.

Chris Turner, director of product marketing in the CPU group at ARM, said that although the file was appropriate to automotive it was largely generic and standards agnostic allowing it to be used for standards in areas such as industrial and medical equipment.

Safety information flow enhances Cortex cores. Source: ARM.

Some of the other standards that take a similar approach to ISO 26262 include IEC 61511, IEC 61513, IEC 62061 and ISO 13849 in industrial machinery, EN5012x covering railway systems, DO-178 and DO-254 in aviation and IEC 62304 in medical equipment. There is a more generic IEC 61508 on the functional safety of electrical and electronic equipment.

In all areas there has an increase in software-programable electronics which incurs a much greater burden when it comes to safety and risk assessment.In the automotive area this is particularly relevant to powertrain and Advanced Driver Assistance Systems (ADAS). In addition the ARM Compiler is now TUV/SUV certified allowing for safety-related software development up to ISO 26262 ASIL D and IEC 61508 SIL 3 without further toolchain qualification activities.

Turner said there is estimated to be up to 100 million lines of source code in modern automobiles and the supply chain needs a way of documenting and assessing its safety before it is deployed.

Turner added that having developed the process around Cortex-R5 it is likely to become almost a universal requirement when developing all Cortex cores in the future. "The Cortex-R5 is first. We will be rolling it out for a number of cores and two or three of these developments are in flight." Turner said they did include devices in the performance-optimized A series and the microcontroller-oriented M series of Cortex cores.

So would ARM be adding the documentation set for free, or does it incur an upfront fee or a kicker to the per unit royalty. "This is incremental value," said Turner, indicating that licensees will pay for the safety file.

"Functional safety techniques are being applied at increasingly lower levels of design?abstraction. ARM’s approach for functional safety designs with the Cortex-R5 core will ease the safety certification burden for our customers in the automotive, health and industrial markets," said Norbert Asche, general manager for safety microcontrollers at Texas Instruments.

Questions or comments on this story? Contact dylan.mcgrath@ihs.com

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