Memory and Storage

Crossbar Edges Closer to ReRAM Debut

15 December 2014

Startup fabless chip company Crossbar says it is continuing to make progress with its silver-over-amorphous-silicon non-volatile memory technology. While the company expects to get silicon back from manufacturing partners in 2015 it is now saying 2016 is when its stand-alone ReRAM could be available in the market and embedded forms of the memory could be available before the end of 2015.

The company has not yet revealed names of foundry or customer partners but Sylvain Dubois, vice president of marketing and business development at Crossbar, said the company is in the middle of transferring the technology to a wafer fab for high-volume manufacturing and that process would produce silicon in 2015, although in sample quantities.

When the company came out of stealth-mode in August 2013 CEO George Minassian said that the embedded version of his company's embedded resistive RAM (ReRAM) technology would be available in 2014 and could be in the field in products such as microcontrollers in 2015.

Dubois told Electronics 360 that in mid-2015 he expected to have samples of stand-alone silver-based filamentary ReRAMs that could be sent to potential customers. Those samples would be used by those customers to gain understand about how the memory could be deployed in equipment and might stimulate refinement for a commercial product definition.

Dubois said he also expected mid-year 2015 to be the point when a foundry could offer a process that included the ReRAM as an embedded NVM option. Dubois said there is already a three-way discussion underway between potential customers, Crossbar and Crossbar's foundry. "But we still need a qualification phase,"

When asked if that was related to automotive use of embedded devices with Crossbar memory, Dubois said that was not particularly the case. "Whether the application is automotive, IoT or industrial, users have to qualify it."

IEDM selector paper

Meanwhile the company will provide some more detail about its technology at a session at the International Electron Devices Meeting behind held this week in San Francisco.

The company will present in Session 6 on the performance of the selector in a 1S1R crossbar array of 4Mbits built using a 110nm process. In 2013 the company said there was an inherent blocking diode within the cross-point stack that helps avoid the "sneak-path problem" that classically besets cross-point arrays. Using select transistors to solve this problem take up additional die area and adversely affect the cost of the technology as well as its power consumption.

Sneak path problem illustrated. A threshold switching selector at each cross-point can prevent this but practicality depends on how good the selector. Source: Crossbar.

It is expected that the "inherent" device is what authors from Crossbar will discuss in their IEDM paper. Hopefully their peers in the audience will press them to reveal the materials that make up the device, which may be related to an interface between the polysilicon and the amorphous silicon. So far the company has not shown details of the crosspoint stack – except to say it is basically a silver top electrode over amorphous silicon over a polysilicon bottom electrode.

Dubois said the detail of the memory stack was still "very sensitive." He added: "It's a kind of switch. Below a threshold voltage the cell is biased off. Above the threshold the switch is open allowing that particular cell to be read. According to the paper abstract in the advanced program Crossbar's authors will claim a very sharp switching slope of >5mV per decade with an on/off ratio of greater than 100 and a 0.1nA sneak current.

Proving the workability of this inherent threshold switch in silicon signals Crossbar's readiness to commercialize 3D-based ReRAM that could store terabytes of data on a single chip, the company said.

Crossbar has already announced its ability to select long chains of its ReRAM cells using a so-called 1TnR selector circuit for read/write operations. While 1TnR enables a single transistor to drive over 2,000 memory cells with very low power, it also experiences leakage of a sneak path current that interferes with the performance and reliability of a typical RRAM array.

Putting this together with 1S1R array selector will allow vertical stacking of memory cells to create dense NVMs. Compatibility with CMOS means that select and interface logic can be placed underneath the stack. Crossbar claims that the selector device is the industry’s first selector capable of suppressing the leakage current below 0.1nA.

Crossbar is clearly aiming at displacing NAND memory in solid-state drives as a main application and claims to have 16 times the density compared to existing memory solutions while delivering 10 times better endurance.

However, NAND is beginning a transition to vertical 3D-NAND structures and investments of billions of dollars are already being made by memory market leaders, Samsung, Toshiba and Micron. The adoption of 3D-ReRAM may have to wait another generation when proven geometric scaling and stacking of ReRAM cells could provide a clearer advantage. As such the right timing the introduction of the Crossbar memory could be more important than introducing at as soon as possible.

Related links and articles:

IHS memory research

News articles:

Addressing Scheme Enables Terabyte Memories, Says Crossbar

Crossbar Funding Moves ReRAM Closer to Market

Micron-Sony ReRAM Gets Second Outing

Samsung Takes V-NAND to 3-bits Per Cell

Switching NAND Helps Micron Raise SSD Specs

Toshiba Begins 3D-NAND Fab Construction

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