As artificial intelligence (AI) transforms industries and redefines computing, memory technologies are foundational to fueling the performance, scalability and efficiency of AI systems. Rambus Design Summit 2025 explores how memory innovation is enabling the AI revolution from data centers to client devices. 
Source: Rambus
The event, tailored for system and chip design engineers, explores the critical role of memory in enabling AI. From the evolution of memory over the past 35 years to cutting-edge solutions for servers, accelerators and client systems, this virtual conference showcases how Rambus technologies are driving AI performance at every level.
Attendees will gain insights into Rambus memory chip solutions for data center and client platforms, memory IP for high-performance AI accelerators and interconnect IP technologies to scale AI infrastructure. A roundtable with Rambus experts will provide perspectives on trends and future directions in memory innovation.
Register for Rambus Design Summit 2025 and discover how memory is being optimized for PC clients and edge platforms to support responsive, low-latency AI experiences. Dive into the latest memory IP standards — HBM4, LPDDR5, and GDDR7 — and their role in powering next-generation AI silicon. Understand how PCIe 7 and CXL 3 are enabling composable architectures and memory expansion for scalable AI deployments.
