In the evolution of the data center, CXL is a big deal.
Short for compute express link, CXL is an open standard interconnect technology used to enable high-bandwidth, low-latency communication between a central processing unit (CPU) and other devices. These include workload accelerators such as graphic processing units (GPUs) and field programmable gate arrays (FPGAs), memory buffers and smart I/O devices.
Version 2.0 of the specification has just been released by the CXL Consortium, an industry standards body dedicated to advancing the technology. The new spec maintains backward compatibility with CXL 1.0 and 1.1; new features include switching, memory pooling and persistent memory support.
“Datacenter architectures continue to evolve rapidly to support the growing demands of emerging workloads for artificial intelligence and machine learning, with CXL technology keeping pace to meet the performance and latency demands,” said Barry McAuliffe, CXL Consortium president.
According to Nathan Brookwood of market research and consulting agency Insight 64, the consortium has moved at “breathtaking speed” to deliver the new specification, “even before products incorporating the first-generation CXL 1.0 and 1.1 specs have reached the market.” Brookwood adds that the additional capabilities of CXL 2.0 “will enable system designers to invent entirely new types of systems that architects could only dream about just a few years ago.”
Little surprise, then, that electronic design automation company Synopsys is referring to its new CXL 2.0 Verification Intellectual Property (VIP) solution — announced on the same day as the CXL 2.0 release — as an “industry first.” VIP is used to shorten SoC verification through the generation of comprehensive tests.
According to a news release, the Synopsys VIP for CXL solution is designed for “breakthrough performance” in data-sensitive system-on-chips (SoCs). It utilizes native SystemVerilog (IEEE 1800) Universal Verification Methodology architecture for integration with existing verification environments; the design speeds up simulation performance, allowing users to run a greater number of tests and accelerate time to first test. Natively integrated with the Synopsys Verdi Protocol and Performance Analyzer, VIP for CXL also includes built-in coverage and verification plans to speed verification closure.
“The advancement of CXL as an open standard interconnect technology to accelerate next generation data center performance is our singular focus,” said Jim Pappas, chairman at CXL Consortium. “We appreciate Synopsys' support of CXL Consortium to help advance the adoption of CXL technology.”
For more information on the Synopsys solution, visit its CXL page. An evaluation copy of the CXL 2.0 specification can also be downloaded here.
