MEMS and Sensors

Report: Japanese foundry Rapidus takes aim at TSMC

10 July 2026

As it ramps up to 2 nanometer process technology, Japanese foundry Rapidus plans to keep the price of its semiconductor contract manufacturing services at the same level or lower than that of the world’s largest semiconductor foundry and competitor, Taiwan’s TSMC.

According to a report from Nikkei, the goal is to attract users away from TSMC through competitive pricing while offering similar advanced processing nodes.

The report cites Rapidus president, Atsuyoshi Koike, who plans to undercut TSMC’s pricing to about $18,460 from $21,540 per wafer.

However, the speculation caused Rapidus to issue a statement on estimated price per wafer. The company statement said because chip prices vary significantly depending on the products ordered, they are “subject to fluctuations due to factors such as exchange rates.” It also added that the “price does not necessarily reflect the actual selling price.”

Why it matters

The company has been ramping up engagement efforts with vendors, meeting with more than 60 overseas companies. In 2024, Japan approved $3.9 billion in subsidies for chip foundry venture Rapidus for mass production of semiconductors on the northern island of Hokkaido. The foundry plans to have 2 nm chip production up and running by the second half of 2027. Rapidus is already supported by eight Japanese companies including Denso, Kioxia, NEC, NTT, MUFG Bank, Sony, Toyota and SoftBank.

The investment is part of Japan’s domestic goal to boost domestic chip sales by five times by 2040.

The move could also signal a shift happening in the semiconductor manufacturing market. This shift is one beyond just the race to advanced nodes and a battle over timelines, but one where challengers are competing on price to gain an edge.

Price matters

According to Business Post, Rapidus’ reported pricing strategy would compete against TSMC’s 2 nm processes and Intel’s 1.8 nm class (dubbed 18 A) that are rumored to be priced at about $30,000 per wafer.

Samsung’s 2 nm process has been estimated at about $20,000 per wafer, highlighting the Korean electronics giant’s own aggressive pricing strategy.

In February of 2025, due to increased tariff pricing, TSMC said it was planning to raise its pricing by as much as 15% on 7 nm process nodes to offset the rising costs. And in July of 2026, Chosun Biz reported TSMC has notified major customers like Nvidia, Apple and AMD of its plan to raise wafer supply prices by 5% to 10% for cutting edge processes like 3 nm and 5 nm.

To contact the author of this article, email PBrown@globalspec.com


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