Data Center and Critical Infrastructure

Researchers Make Strides in Anti-ferromagnetic Magnetoelectric Memory Chips

03 January 2017

Researchers at the Helmholtz-Zentrum Dresden-Rossendorf (HZDR) have developed a new memory chip concept that potentially would use considerably less energy than current random access memory.

The results of the memory concept could have great implications not only for mobile applications, but also for big data computing centers.

Anti-ferromagnetic magnetoelectric memory (AF-MERAM) could reduce voltage used in data centers and mobile devices by a factor of 50. Source: Helmholtz-Zentrum Dresden-Rossendorf Anti-ferromagnetic magnetoelectric memory (AF-MERAM) could reduce voltage used in data centers and mobile devices by a factor of 50. Source: Helmholtz-Zentrum Dresden-Rossendorf Purely electrical memory chips that are used in many applications today are volatile and must be continuously refreshed, which requires a lot of energy. This leads to hefty electricity bills in large computing centers. These chips increasingly heat up based on their energy consumption, and data centers have a hard time dissipating this heat, leading to some cloud operators setting up farms in cold regions.

While some alternatives to electrical memory chips have been created, these magneto-resistive random-access memory (MRAM) chips, which save data magnetically and do not require constant refreshing, require large electrical currents to write data to memory. They also wear out too quickly and break down if disruptions occur during the writing and reading process.

Researchers at HZDR have been working on an alternative to MRAM called magnetoelectric anti-ferromagnets. These chips are activated by electrical voltage rather than by current, but it is difficult to write and read data when using them, negating many of the advantages.

The HZDR researchers have developed a purely anti-ferromagnetic magnetoelectric memory (AF-MERAM) prototype based on a thin layer of chromium oxide. This layer is inserted between two nanometer-thin electrodes. As voltage is applied to these electrodes, the chromium oxide flips into a different magnetic state and data is written.

“In contrast to other concepts, we could reduce the voltage by a factor of 50,” says Dr. Tobias Kosub, post-doctoral researcher at HZDR. “This allows us to write a bit without excessive energy consumption and heating.”

Researchers found one challenge is the ability to read out the written bit again. To combat this, researchers placed a nanometer-thin platinum layer on top of the chromium oxide, enabling the readout through a special electrical phenomenon called the Anomalous Hall Effect. The actual signal is very small and is superimposed by interference signals.

“The material is thus far working at room temperature, but only within a narrow window,” says Kosub. “We want to considerably expand the range by selectively altering the chromium oxide.”

The next steps will be to integrate several memory elements on a single chip. So far, only a single element was realized, which can store merely one bit. Future research will include constructing an array of several elements that could lead to memory chips being produced using standard methods employed by the industry today.

To contact the author of this article, email PBrown@globalspec.com


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