Semiconductor fabrication is made possible through the repeated steps of lithography, etching, deposition. How many times this process is repeated depends on the specifics of the devices being created.
Lithography makes up many of the vital steps of semiconductor production. In lithography, a thin layer of photoresist, or a special chemical that develops when exposed to light, is spread over the semiconductor wafer. Once the layer has cured, it is exposed to light through a pattern, mask or reticle, developing some parts of the photoresist and not others. The exposed photoresist bonds to some areas and the unexposed resist does not bond, or vice versa, depending on the chemical makeup of the photoresist.
Once the photoresist has been exposed, the wafer is exposed to a chemical or physical etchant, which removes the photoresist and some of the wafer, in a selected pattern. Because certain areas of the photoresist are exposed, a pattern has now been printed on the wafer, and it is ready for another processing step.
Because this process is so exacting, there are many problems that can occur during the lithography step. This article highlights a few of those problems.
Photoresist issues
For the photoresist to be properly applied, it must be uniform in consistency and viscosity. Often, it is applied via spin coating, which helps to create a thin, uniform coating. However, depending on the surface tension of the photoresist, there tends to be a thicker coating in the center of the wafer and along the edges, especially if the viscosity is high. Furthermore, the viscosity can change as the photoresist ages, as solvents evaporate over time, meaning the photoresist that was opened yesterday will have different properties than that opened a week ago.
Besides uneven coatings, photoresist may not cure properly. This can be due to inhomogeneity of the photoresist or contamination on the wafer. While unlikely in a semiconductor production facility, improperly handled wafers (such as with bare hands) may deposit a layer of oil on the wafer that reduces the bonding between the wafer and the photoresist.
Spalling is another problem related to uneven coatings. In this case, improper heat treatment, such as hot spots on a heating plate may lead to excess thermal expansion of the wafer. This can cause the photoresist to chip off, leaving a chunk of unintentionally exposed wafer.
Scanner-side Issues
The device that exposes the photoresist-covered wafer to light is called the scanner. Typically, the scanner emits a single wavelength of light (through a laser) to the wafer. The wavelength of light must match the acceptable range of the photoresist, as the wrong wavelength of light will not expose the photoresist.
The name scanner describes its operation; the laser rasters across the surface of the mask, selectively exposing the photoresist. The scanner itself can cause several problems, or at least issues that must be considered during semiconductor design. For example, if the scanner relies on tilting the laser to raster it across the surface, the design must account for the angle that the laser makes with the mask. Newer designs do not rely on tilting the laser but move the laser across the surface such that it forms a constant angle with the pattern, reducing this effect, but adding to the complexity of the machine. Along these lines, the resolution (the smallest size) of the designs must meet either the raster angle or the x and y sweep of the laser. Otherwise, small features will be missed.
One of the more common scanner issues is with alignment. Each layer must be precisely aligned with the previous layers. All wafers have an index mark of some sort that the scanner attempts to use as an alignment mark. However, considering the current state-of-the-art features are under 20 nm across, it does not take a large error to misalign one layer to the next. Misalignments can be in the x or y direction, or rotational. Misalignments are such a nuisance; most semiconductor manufacturers have a step called “registration” where the alignment is checked at each lithography step.
Mask/reticle issues
Perhaps the most common defects are with the masks, patterns and reticles. Each layer will have a designated mask. The mask is often just one or two patterns, so it may move with the laser. Older masks may have more than one or two patterns, perhaps up to the entire wafer’s pattern on them.
There are advantages and disadvantages to each style. For single or double masks, there is less mask to be damaged or collect particles. They can be significantly cheaper to manufacture and replace. However, if there is a major defect, it will show up across all the chips (or half, in the case of a double mask). For example, consider a mask with two patterns- where one pattern is partially obscured by a dust particle. Half of the chips will be exposed incorrectly. In the case of a full mask, only one chip out of the entire lot will be exposed incorrectly.
Masks can create defects if they collect dust particles. Some of these particles can be blown off in a reticle cleaning step, but sometimes they are more difficult to remove. Some reticles will have a transparent film that is placed above the reticle. This collects the particles and keeps them from landing on the reticle, but it also keeps the particle out of focus, limiting the extent of their damage to the chips. Unfortunately, the presence of this film can lead to the buildup of static charge, which can discharge and damage either the reticle or the chip in certain circumstances. It can also attract particles. Furthermore, particles trapped on the film may be more difficult to blow off during the reticle cleaning step.
Finding solutions
The drive to produce smaller and smaller components means these issues will continue to appear. Smaller pitch and features on chips will lead to more sensitivity to particle contamination, photoresist inconsistencies and scanner issues. However, the trick has been to add more enhanced monitoring steps. If defects are caught early enough, specific layers can be milled or etched away, and the wafer reworked. While the yields of a “reworked” lot are lower, they can reduce overall costs, as a wafer that is scrapped in the late stages of production is a major financial loss.