Electronics and Semiconductors

AImotive Unveils Third-Generation Neural Network for Self-Driving Cars

05 November 2018
AImotive's technology allows automotive OEMs to create neural networks for autonomous driving. Source: AImotive

AImotive has been working on its autonomous vehicle (AV) technology for a number of years, focusing on vision-first technology that will help automotive OEMs and Tier 1 suppliers achieve self-driving capabilities faster. It showed off these capabilities in a highway test last year.

Now the company has released its AiWare3, the third-generation, scalable, low-power, hardware neural network (NN) acceleration core. The technology is designed for the rigorous requirements of automotive embedded solutions by providing heightened performance in both central processing and sensor fusion units for those companies seeking to achieve Level 3 autonomy.

The AiWare3 architecture allows for continued operation for autonomous vehicles with up to 12 or more high-resolution cameras or LiDAR. The technology delivers up to 50 TMAC/s per chip at more than 2 TMAC/s per watt, AImotive said. The processing power allows for low-latency, high frame rate segmentation, perception and classification in self-driving systems.

The platform enables OEMs to implement a variety of NN acceleration strategies in hardware platforms that can be shared among multiple workloads as part of the central processing unit or pre-processing integrated into each sensor or groups of sensors.

“Our portfolio of hardware technologies enables the implementation of high-performance, AI-based ECUs that allow our automotive partners to move beyond demonstrators and into volume AV production,” said Marton Feher, senior vice president of hardware engineering at AImotive. “AiWare3 makes NN processing for multi HD sensor configurations achievable, which is essential for AVs. It answers the question of how best to implement hardware platforms capable of delivering the real-time, high performance results required by future AVs’ NN-based AI systems; and it does so at low power and to full ASIL-D standards if required.”

The AiWare3 IP core can be implemented on-chip as part of a system-on-chip (SoC) for central processing, sensor processing or sensor fusion gateway subsystems. It can also form the basis of one or more accelerator chips working alongside an SoC in autonomous NN acceleration subsystem.

AiWare3 is supported by a software development kit (DSK). The technology will ship to customers in the first quarter of 2019.

To contact the author of this article, email PBrown@globalspec.com


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