Semiconductors and Components

India Details Wafer Fab Subsidies

17 February 2014

The Indian government has formally approved plans to establish two wafer fabs in India as part of efforts to raise Indian domestic production of electronic equipment and components and reduce its balance of payments deficit. Along with the approvals for the two $5 billion wafer fabs – in Uttar Pradesh and Pranij, Gujurat – have come details of funding support that will be provided.

The levels of subsidy are significant, at 25 percent on all capital expenditures by way of tax reimbursements, and each plant will benefit from an interest free loan of 51,240 million rupees (about $830 million). This suggests that India remains committed to its initiative to bring up chip manufacturing despite arguments that it is too late in a semiconductor sector that is consolidating.

And, the wheels of Indian administration grind slowly. The project has been in planning since 2011 and even now final agreements are "expected to be signed by August 2014." If construction of the wafer fabs begins in summer 2014 first silicon out could not be expected before 2016.

A press statement from the Cabinet office of the Indian government said that the proposed wafer fabs are expected to create direct employment of about 22,000 people and indirect employment of 100,000 people. These numbers are high as wafer fabs are typcially heavily automated and have typically employed far fewer staff, both directly and indirectly.

The fab at Yamuna Expressway, Uttar Pradesh, is being constructed by Jaiprakash Associates Ltd. with IBM Corp. and Tower Semiconductor Ltd. as partners. The projected cost is 344 billion rupees (about $5.6 billion) with a manufacturing capacity of 40,000 wafer starts per month on process technology that is expected to start at 90nm and move down through the 65nm and 45nm nodes to 28nm. IBM is believed to be providing manufacturing process technology and Tower will operate the fab in return for retaining a portion of the output for its own requirements.

The fab at Pranij, Gujurat, is being constructed by HSMC Technologies Pvt. Ltd. with STMicroelectronics NV and Silterra Malaysia Sdn. Bhd. as partners. The projected cost is 290 billion rupees (about $4.7 billion) with the same manufacturing capacity and a view to taking the process down to 22nm.

There has been much discussion about the viability of these proposed fabs and what types of integrated circuit would give them the best chance of success. Tower, committed to operating the fab in Uttar Pradesh is experienced at running speciality processes behind the leading edge. Similarly, Silterra, which was created as a project of strategic Malaysian national interest in 1995 offers a broad range of fabrication processes for logic, mixed-signal and radio frequency and high-voltage applications.

India consumes close to $7 billion worth of semiconductors every year and this is expected to expand to $55 billion by 2020, according to the Indian Electronics and Semiconductor Association. The plan to also make ICs to offset this deficit is seen as both strategic in its own right but also as a catalyst the complete electronic equipment value chain.

Related links and articles:

Indian government Feb. 14 press release

News articles:

IBM Chip Unit Sale Would Send Tremor Through Industry

India Green Lights Two 300-mm Chip Fabs

Indian startup Offers Compact Speech Recognition Core

Argentina Set to Save Brazilian Wafer Fab

Tower Forms Chip-Making JV with Panasonic

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