Grid-connected three-phase AC/DC (or DC/AC) power conversion is required in a wide range of industrial applications—from power electronic interfaces in renewable energy systems (solar, wind and batteries) to vehicle charging and regenerative motor drives (elevators, mills, etc.). These systems are designed to source/sink an AC current with a total harmonic distortion (THDI) of less than five percent to meet regulation standards. A practical example of such a three-phase grid-tied AC/DC system would be a fast charging station for electric vehicles. Figure 1 shows a functional block diagram of a three-phase fast off-board charger for battery electric vehicles (BEVs).
Given known power semiconductor technology and known AC/DC circuit topology, the achievable cost/performance space in this active front end or active PFC system is limited. For bidirectional applications, the two-level topologies using 1200 V IGBTs, three-level topologies using SJ FETs or fast 650 V IGBTs are typically used. Two-level topologies with 1200 V IGBTs offer simplicity, low semiconductor cost and high power capability (>20 kW), but switching frequency is switching loss limited to <20 kHz, yielding systems with lower power density, lower efficiency and expensive inductors.
Multi-level topologies such as the neutral point clamped (NPC) rectifier offer higher power density and efficiency (lower switching losses) at the expense of higher circuit complexity and cost.
Figure 2 shows the two-level IGBT and three-level NPC rectifier topologies.
For unidirectional PFC applications, topologies such as the silicon Vienna rectifier offer a good tradeoff between cost, efficiency, power density and complexity. Previous research has found the Vienna rectifier superior to the two-level, six-switch IGBT-based PFC for FSW >16 kHz due to high IGBT switching losses.
Whilst silicon IGBTs or silicon MOSFETs facilitate adequate AFEs, the need for higher efficiency, greater power density, lower cost and bi-directionality pose significant design challenges when using silicon in traditional circuit approaches. However, an alternative approach utilizing SiC MOSFETs drastically reduces switching losses (versus 1200 V IGBTs) and significantly extends the usable switching frequency range of the two-level, six-switch PFC rectifier, while maintaining higher full-load and part-load efficiency. Additionally, when employing SiC MOSFETs, the device’s body diode can be used as the anti-parallel diode, reducing circuit complexity and cost.
Figure 3 shows the two-level SiC MOSFET and three-level silicon Vienna rectifier topologies.
In reality, designers today are choosing between a well- known but habitual silicon three-level Vienna rectifier for unidirectional PFC, or a progressive SiC MOSFET-based two- level for both a uni- and bi-directional approach.
This article showcases a cost-effective, highly efficient design alternative for an industrial PFC application with the entire design based on SiC power MOSFET devices that are fully released, fully qualified and manufactured in substantial volumes. Challenging the traditional silicon-based Vienna rectifier with a two-level SiC PFC system, this design meets the same system-level specifications as presented in Table I. The proposed two-level SiC system follows the power topology in Figure 3 (top), and is compared to a six-switch Vienna rectifier, on the bottom of Figure 3.
Design of a Two-Level, Six-Switch SIC-Based PFC System
To meet the system-level specifications presented in Table I, dimensioning of semiconductors for the two-level six-switch SiC system was performed using standard three-phase two-level voltage source inverter design equations.
For this power level a new 1000 V / 65 mΩ SiC MOSFET was selected. This part delivers extremely low switching losses thanks to a four-lead TO-247 package with dedicated Kelvin source connection. In addition, the optimized 1000 V blocking and rugged body diode capability allows for minimum die cost while supporting up to 800 VDC link operation. Figure 4 shows the device switching loss behavior as a function of drain current. Figure 5 shows the RDSON behavior versus temperature.
Using the device static and dynamic characteristics, the system semiconductor losses can be estimated at switching frequencies as shown in Figure 6. The losses were calculated assuming a constant device junction temperature of 110° C. As such, the heatsink size must be increased accordingly as semiconductor losses increase. Lastly, since the proposed two-level SiC system makes use of the MOSFET body diode, the calculated switching losses do include body diode reverse recovery losses.
Outside of SiC MOSFET implementation, special attention was given to switching frequency and the boost inductor design for size and optimization of each inductor to yield the required inductance value, current rating, switching frequency, and ripple; plus second order effects of high switching frequency such as EMI filter requirements, control platform requirements and control complexity (i.e. sensor bandwidth, gate driver delays, etc.).
For prototype implementation, a switching frequency of 48 kHz and an inductor current ripple of approximately 20 percent (at 380 V input) were selected as a compromise between low boost inductor cost and low power semiconductor RMS current requirements. The final inductance of 400 µH was selected. The selection of the 48 kHz switching frequency allows minimization of differential-mode EMI filtering requirements (and associated cost) as in this case the first and third harmonic of Fsw falls below the 150 kHz EMI requirement.
Figure 7 shows photographs of the 20 kW two-level SiC hardware prototype. The figure shows the 400 µH inductors along with a detailed view of the power board (bottom right photograph). The power stage is composed of two paralleled 1,000 V/65 mΩ SiC MOSFETs per switch position. The devices are packaged on TO-247-4L discrete packages with a dedicated source Kelvin connection. They offer a cost-optimized solution by eliminating the needed for anti-parallel Schottky diodes. This also simplifies power PCB layout and heatsink mounting.
The twelve TO-247-4L discrete devices are bolted to an extruded aluminum heatsink and soldered into the power PCB containing input and output connectors, DC link film capacitors, isolated gate drivers, gate drive buffers and isolated gate drive power supplies. The three 400 µH phase inductors were not mounted to the PCB. The control PCB contains a floating-point DSP, high-bandwidth Hall-effect phase current sensors, isolated phase voltage sensing, diagnostic I/O access and LED status indicators. ADC sampling and control loops execute synchronously with every PWM switching cycle, and the firmware has been optimized to operate comfortably at an execution rate FSW of up to 60 kHz.
Figure 8 shows the input voltage and input current for Phase A under full power conditions at FSW = 48 Hz and 60 kHz, respectively.
A power analyzer was used to measure system efficiency and THDI. Figure 9 summarizes the collected results. The prototype demonstrated a full-load efficiency of 98.4 percent and THDI of 2.39 percent at 480 V / 60 Hz input, 800 V output and 48 kHz switching frequency with grid inductance of 400 µH. For 380 V input voltage, the prototype demonstrated a full-load efficiency of 98.2 percent and THDI of 1.65 percent. DC link voltage and inductors were kept the same as the 480 V case.
Comparison to Vienna Rectifier
Referencing previous studies on a complete design of a 10 kW Vienna rectifier optimized for efficiency and density, the requirements of the targeted system (Table I) and the referenced work are similar except for power level. This project followed the design and optimization approach previously done, while increasing the system power level from 10 kW to 20 kW.
The Vienna rectifier requires the sizing of three active components, MOSFETs S1-6, rectifying diodes DN 1-6, and fast recovery diodes DF 1-6. Using devices’ datasheet information and appropriate sizing equations, semiconductor losses were estimated as a function of switching frequency (see Figure 10). As expected, the semiconductor losses in the Vienna rectifier are dominated by conduction losses rather than switching losses; in particular, diode conduction losses. While this can be slightly reduced with selecting higher current rating components (at expense of increased cost), some of that was already accomplished by selecting low-VF parts.
Comparing Figure 6 to Figure 10, it is clear that: 1) the Vienna rectifier has higher semiconductor losses than the two-level, six-switch SiC PFC, and 2) the semiconductor losses in the Vienna rectifier are less susceptible to changes in switching frequency than the semiconductor losses in the two-level, six-switch SiC PFC.
Figure 11 shows the semiconductor efficiency versus frequency for the designed two-level, six-switch SiC PFC and three-level Vienna rectifier. The plot shows that at low switching frequency (40-60 kHz) the two-level SiC system delivers approximately 0.8 percent higher semiconductor efficiency. This efficiency gain is also demonstrated via hardware measurements when comparing results presented studied on a 10 kW/72 kHz Vienna prototype and the results measured in this work.
The design of the boost inductors for the Vienna rectifier follows the same approach. In the case of the Vienna rectifier, the switching frequency can be increased to just below 75 kHz to avoid having to filter the second harmonic when designing the EMI filter (i.e. 2 × 75 kHz = 150 kHz).
A second important difference between the proposed two-level, six-switch SiC PFC and the Vienna rectifier is cooling requirements. Based on semiconductor efficiency, the proposed two-level, six-switch SiC PFC needs to dissipate a minimum power of 230 W while the Vienna rectifier requirement is 358 W.
When estimating the overall volume of both systems, we can conclude that the power density of the proposed two-level, six-switch SiC PFC is higher than the power density of the Vienna rectifier. The Vienna rectifier shows a slight reduction in inductor volume but a 2x increase in cooling system volume.
When estimating the overall efficiency, the proposed two-level, six-switch SiC PFC delivers an approximately 0.8 percent efficiency improvement over the Vienna rectifier. This is primarily driven by the semiconductor efficiency gain. Losses on boost inductors and EMI filters are largely the same between the two systems. The slight increase in boost inductor and EMI filter losses for the proposed two-level, six-switch SiC PFC is mostly compensated by the higher cooling needs of the Vienna rectifier. As such, a 0.8 percent system-level efficiency gain is an acceptable estimate.
Using market knowledge on active and passive component cost modeling, we can estimate the total cost of semiconductor devices for each system. In the case of the Vienna rectifier, there are twelve 600 V/40 mΩ C7 CoolMOS devices (IPZ60R040C7), six 650 V/20 A low-VF SiC Schottky diodes (CVFD20065) and six 800 V/40 A low-VF Si rectifying diodes (VS-40EPS08PBF). Because the Vienna rectifier design involves considerably more silicon, packaging, manufacturing and assembly, from a long-term reliability perspective there are more devices to potentially fail. The Wolfspeed-enabled two-level SiC system requires only twelve 1000 V / 65 mΩ SiC MOSFETs—approximately the same total semiconductor cost as the Vienna rectifier, but with less assembly cost and higher MTTF.
Also, the silicon Vienna rectifier has unidirectional function only, whereas the six switch SiC rectifier has full bidirectional functionality.
This article shows designers the improved performance versus cost tradeoff space enabled by 1,000 V SiC MOSFETs and a simple two-level, six-switch three-phase PFC topology. These devices promise to breathe new life into this well-understood simple topology and, with appropriate control systems, mitigate the conventional barriers to achieving high performance at increased switching frequencies with full bidirectional functionality
SiC MOSFETs used were TO-247-4L discrete packages with source Kelvin connection. The 1000 V / 65 mΩ SiC MOSFETs in TO-247-4L discrete offer a cost-optimized solution that eliminates the need for anti-parallel SiC Schottky diodes. The prototype was tested to full power where measured results suggest a potential 0.8 percent efficiency improvement over the optimized 10 kW/72 kHz Vienna prototype presented.
Such increase in efficiency is significant in server, UPS, battery charging and other energy efficiency sensitive applications where operational cost of the electronics play an important role in total cost of ownership. Lastly, simple control changes can be made to the two-level, six-switch SiC based PFC to achieve bidirectional power flow, something not possible with a Vienna rectifier.