The invasive nature and large size of available implanted electrode devices for brain stimulation prompted Columbia University researchers to explore options for an improved brain-machine interface. Backed by a four-year $15.8 million grant from the U.S. Department of Defense’s Defense Advanced Research Projects Agency, the engineers are designing an implantable brain-interface device at the scale of one million channels to enable recording and stimulation from the sensory cortex.
“We think the only way to achieve this is to use an all-electrical approach that involves a massive surface-recording array with more than one million electrodes fabricated as a monolithic device on a single complementary metal-oxide-semiconductor (CMOS) integrated circuit. We are working with the Taiwan Semiconductor Manufacturing Company as our foundry partner,” says Ken Shepard, professor of electrical engineering.
The degree of noninvasiveness required for human use can only be achieved within this aggressive four-year time frame with electrode architectures based on stimulation and recording at the brain surface. The team contends this can be realized by exploiting the full capabilities of leading-edge CMOS technology, together with the industry’s associated manufacturing capabilities, and by using monolithic integration of stimulation/recording electrodes with an underlying CMOS electronics platform.
The implanted silicon chips are ultra-conformable to the brain surface and flexible enough to move with the tissue. The array is equipped with wireless powering and data telemetry.
Researchers from Baylor College of Medicine, California Institute of Technology, Duke University, New York University, Northwestern and Medtronic are also participating in the program.